drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_pp_smu.c

186

static enum dm_pp_clocks_state pp_to_dc_powerlevel_state(

drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c

194

enum dm_pp_clocks_state dce_get_required_clocks_state(

drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c

200

enum dm_pp_clocks_state low_req_clk;

drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.c

293

enum dm_pp_clocks_state clk_state = DM_PP_CLOCKS_STATE_INVALID;

drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/dce_clk_mgr.h

35

enum dm_pp_clocks_state dce_get_required_clocks_state(

drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c

213

static enum dm_pp_clocks_state dce_get_required_clocks_state(

drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c

219

enum dm_pp_clocks_state low_req_clk;

drivers/gpu/drm/amd/display/dc/dce/dce_clk_mgr.c

365

enum dm_pp_clocks_state clk_state = DM_PP_CLOCKS_STATE_INVALID;

drivers/gpu/drm/amd/display/dc/dm_services_types.h

250

enum dm_pp_clocks_state power_level;

drivers/gpu/drm/amd/display/dc/dm_services_types.h

263

enum dm_pp_clocks_state max_clocks_state;

drivers/gpu/drm/amd/display/dc/dm_services_types.h

62

enum dm_pp_clocks_state clock_state;

drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h

410

enum dm_pp_clocks_state max_clks_state;

drivers/gpu/drm/amd/display/dc/inc/hw/clk_mgr_internal.h

411

enum dm_pp_clocks_state cur_min_clks_state;