dispc_read_reg
val = dispc_read_reg(dispc, DISPC_OVL_ATTRIBUTES(plane));
val = dispc_read_reg(dispc, DISPC_OVL_ATTRIBUTES(plane));
val = dispc_read_reg(dispc, DISPC_OVL_ATTRIBUTES(plane));
v = dispc_read_reg(dispc, DISPC_GLOBAL_BUFFER);
l = dispc_read_reg(dispc, DISPC_OVL_ATTRIBUTES(plane));
l = dispc_read_reg(dispc, DISPC_CONTROL);
l = dispc_read_reg(dispc, DISPC_DIVISORo(channel));
l = dispc_read_reg(dispc, DISPC_DIVISORo(channel));
l = dispc_read_reg(dispc, DISPC_DIVISOR);
seq_printf(s, "%-50s %08x\n", #r, dispc_read_reg(dispc, r))
dispc_read_reg(dispc, DISPC_REG(i, r)))
dispc_read_reg(dispc, DISPC_REG(plane, name, i)))
return dispc_read_reg(dispc, DISPC_IRQSTATUS);
u32 old_mask = dispc_read_reg(dispc, DISPC_IRQENABLE);
dispc_read_reg(dispc, DISPC_IRQENABLE);
l = dispc_read_reg(dispc, DISPC_DIVISOR);
dispc->ctx[DISPC_##reg / sizeof(u32)] = dispc_read_reg(dispc, DISPC_##reg)
rev = dispc_read_reg(dispc, DISPC_REVISION);
FLD_GET(dispc_read_reg(dispc, idx), start, end)
FLD_MOD(dispc_read_reg(dispc, idx), val, start, end))
val = dispc_read_reg(DISPC_OVL_ATTRIBUTES(plane));
v = dispc_read_reg(DISPC_GLOBAL_BUFFER);
l = dispc_read_reg(DISPC_OVL_ATTRIBUTES(plane));
dispc.ctx[DISPC_##reg / sizeof(u32)] = dispc_read_reg(DISPC_##reg)
l = dispc_read_reg(DISPC_CONTROL);
l = dispc_read_reg(DISPC_DIVISORo(channel));
l = dispc_read_reg(DISPC_DIVISORo(channel));
l = dispc_read_reg(DISPC_DIVISORo(channel));
l = dispc_read_reg(DISPC_DIVISOR);
#define DUMPREG(r) seq_printf(s, "%-50s %08x\n", #r, dispc_read_reg(r))
dispc_read_reg(DISPC_REG(i, r)))
dispc_read_reg(DISPC_REG(plane, name, i)))
return dispc_read_reg(DISPC_IRQSTATUS);
return dispc_read_reg(DISPC_IRQENABLE);
u32 old_mask = dispc_read_reg(DISPC_IRQENABLE);
l = dispc_read_reg(DISPC_DIVISOR);
rev = dispc_read_reg(DISPC_REVISION);
FLD_GET(dispc_read_reg(idx), start, end)
dispc_write_reg(idx, FLD_MOD(dispc_read_reg(idx), val, start, end))
val = dispc_read_reg(DISPC_OVL_ATTRIBUTES(plane));
val = dispc_read_reg(DISPC_OVL_ATTRIBUTES(plane));