drivers/gpu/drm/tidss/tidss_dispc.c

1119

while (!(oldi_reset_bit & dispc_read(dispc, DSS_SYSSTATUS)) &&

drivers/gpu/drm/tidss/tidss_dispc.c

1123

if (!(oldi_reset_bit & dispc_read(dispc, DSS_SYSSTATUS)))

drivers/gpu/drm/tidss/tidss_dispc.c

2800

dispc_read(dispc, DSS_REVISION));

drivers/gpu/drm/tidss/tidss_dispc.c

545

while (!(oldi_reset_bit & dispc_read(tidss->dispc, DSS_SYSSTATUS)) &&

drivers/gpu/drm/tidss/tidss_dispc.c

549

if (!(oldi_reset_bit & dispc_read(tidss->dispc, DSS_SYSSTATUS)))

drivers/gpu/drm/tidss/tidss_dispc.c

566

((u32)FIELD_GET((mask), dispc_read((dispc), (idx))))

drivers/gpu/drm/tidss/tidss_dispc.c

572

u32 _reg = dispc_read(_dispc, _idx); \

drivers/gpu/drm/tidss/tidss_dispc.c

743

dispc_read(dispc, DISPC_IRQSTATUS));

drivers/gpu/drm/tidss/tidss_dispc.c

786

u32 stat = dispc_read(dispc, DISPC_VP_IRQSTATUS(hw_videoport));

drivers/gpu/drm/tidss/tidss_dispc.c

803

u32 stat = dispc_read(dispc, DISPC_VID_IRQSTATUS(hw_id));

drivers/gpu/drm/tidss/tidss_dispc.c

820

u32 stat = dispc_read(dispc, DISPC_VP_IRQENABLE(hw_videoport));

drivers/gpu/drm/tidss/tidss_dispc.c

837

u32 stat = dispc_read(dispc, DISPC_VID_IRQENABLE(hw_id));

drivers/gpu/drm/tidss/tidss_dispc.c

867

dispc_write(dispc, DISPC_IRQSTATUS, dispc_read(dispc, DISPC_IRQSTATUS));

drivers/gpu/drm/tidss/tidss_dispc.c

870

dispc_read(dispc, DISPC_IRQSTATUS);

drivers/gpu/drm/tidss/tidss_dispc.c

945

dispc_read(dispc, DISPC_IRQENABLE_SET);