drivers/gpu/drm/omapdrm/dss/base.c

19

struct dispc_device *dispc_get_dispc(struct dss_device *dss)

drivers/gpu/drm/omapdrm/dss/dispc.c

1002

static void dispc_ovl_setup_global_alpha(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

1017

static void dispc_ovl_set_pix_inc(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

102

int (*calc_scaling)(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

1023

static void dispc_ovl_set_row_inc(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

1029

static void dispc_ovl_set_color_mode(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

1102

static void dispc_ovl_configure_burst_type(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

1115

static void dispc_ovl_set_channel_out(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

1178

static enum omap_channel dispc_ovl_get_channel_out(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

1219

static void dispc_ovl_set_burst_size(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

1231

static void dispc_configure_burst_sizes(struct dispc_device *dispc)

drivers/gpu/drm/omapdrm/dss/dispc.c

1243

static u32 dispc_ovl_get_burst_size(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

1250

bool dispc_ovl_color_mode_supported(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

1266

const u32 *dispc_ovl_get_color_modes(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

1272

static void dispc_mgr_enable_cpr(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

1281

static void dispc_mgr_set_cpr_coef(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

1302

static void dispc_ovl_set_vid_color_conv(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

1314

static void dispc_ovl_enable_replication(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

1329

static void dispc_mgr_set_size(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

1340

static void dispc_init_fifos(struct dispc_device *dispc)

drivers/gpu/drm/omapdrm/dss/dispc.c

1415

static u32 dispc_ovl_get_fifo_size(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

1429

void dispc_ovl_set_fifo_threshold(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

1472

void dispc_ovl_compute_fifo_thresholds(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

1519

static void dispc_ovl_set_mflag(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

1532

static void dispc_ovl_set_mflag_threshold(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

1540

static void dispc_init_mflag(struct dispc_device *dispc)

drivers/gpu/drm/omapdrm/dss/dispc.c

1597

static void dispc_ovl_set_fir(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

1621

static void dispc_ovl_set_vid_accu0(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

1639

static void dispc_ovl_set_vid_accu1(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

1657

static void dispc_ovl_set_vid_accu2_0(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

1667

static void dispc_ovl_set_vid_accu2_1(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

1677

static void dispc_ovl_set_scale_param(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

1694

static void dispc_ovl_set_accu_uv(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

1783

static void dispc_ovl_set_scaling_common(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

1838

static void dispc_ovl_set_scaling_uv(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

1921

static void dispc_ovl_set_scaling(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

1940

static void dispc_ovl_set_rotation_attrs(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

2246

static int dispc_ovl_calc_scaling_24xx(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

2295

static int dispc_ovl_calc_scaling_34xx(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

2383

static int dispc_ovl_calc_scaling_44xx(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

2447

enum omap_overlay_caps dispc_ovl_get_caps(struct dispc_device *dispc, enum omap_plane_id plane)

drivers/gpu/drm/omapdrm/dss/dispc.c

2455

static int dispc_ovl_calc_scaling(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

2564

void dispc_ovl_get_max_size(struct dispc_device *dispc, u16 *width, u16 *height)

drivers/gpu/drm/omapdrm/dss/dispc.c

2570

static int dispc_ovl_setup_common(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

2749

int dispc_ovl_setup(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

2777

int dispc_ovl_enable(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

2787

static void dispc_lcd_enable_signal_polarity(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

2796

void dispc_lcd_enable_signal(struct dispc_device *dispc, bool enable)

drivers/gpu/drm/omapdrm/dss/dispc.c

2804

void dispc_pck_free_enable(struct dispc_device *dispc, bool enable)

drivers/gpu/drm/omapdrm/dss/dispc.c

2812

static void dispc_mgr_enable_fifohandcheck(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

2820

static void dispc_mgr_set_lcd_type_tft(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

2826

static void dispc_set_loadmode(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

2833

static void dispc_mgr_set_default_color(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

2839

static void dispc_mgr_set_trans_key(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

2849

static void dispc_mgr_enable_trans_key(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

2855

static void dispc_mgr_enable_alpha_fixed_zorder(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

2868

void dispc_mgr_setup(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

2884

static void dispc_mgr_set_tft_data_lines(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

2911

static void dispc_mgr_set_io_pad_mode(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

2941

static void dispc_mgr_enable_stallmode(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

2947

void dispc_mgr_set_lcd_config(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

2965

static bool _dispc_mgr_size_ok(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

2972

static bool _dispc_lcd_timings_ok(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

2986

static bool _dispc_mgr_pclk_ok(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

2996

int dispc_mgr_check_timings(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

3021

static void _dispc_mgr_set_lcd_timings(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

3089

void dispc_mgr_set_timings(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

3138

static void dispc_mgr_set_lcd_divisor(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

3153

static void dispc_mgr_get_lcd_divisor(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

3163

static unsigned long dispc_fclk_rate(struct dispc_device *dispc)

drivers/gpu/drm/omapdrm/dss/dispc.c

3185

static unsigned long dispc_mgr_lclk_rate(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

3215

static unsigned long dispc_mgr_pclk_rate(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

3236

void dispc_set_tv_pclk(struct dispc_device *dispc, unsigned long pclk)

drivers/gpu/drm/omapdrm/dss/dispc.c

3241

static unsigned long dispc_core_clk_rate(struct dispc_device *dispc)

drivers/gpu/drm/omapdrm/dss/dispc.c

3246

static unsigned long dispc_plane_pclk_rate(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

3259

static unsigned long dispc_plane_lclk_rate(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

3272

static void dispc_dump_clocks_channel(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

3294

void dispc_dump_clocks(struct dispc_device *dispc, struct seq_file *s)

drivers/gpu/drm/omapdrm/dss/dispc.c

3332

struct dispc_device *dispc = s->private;

drivers/gpu/drm/omapdrm/dss/dispc.c

344

static unsigned long dispc_fclk_rate(struct dispc_device *dispc);

drivers/gpu/drm/omapdrm/dss/dispc.c

345

static unsigned long dispc_core_clk_rate(struct dispc_device *dispc);

drivers/gpu/drm/omapdrm/dss/dispc.c

346

static unsigned long dispc_mgr_lclk_rate(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

348

static unsigned long dispc_mgr_pclk_rate(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

351

static unsigned long dispc_plane_pclk_rate(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

353

static unsigned long dispc_plane_lclk_rate(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

3530

int dispc_calc_clock_rates(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

3545

bool dispc_div_calc(struct dispc_device *dispc, unsigned long dispc_freq,

drivers/gpu/drm/omapdrm/dss/dispc.c

356

static inline void dispc_write_reg(struct dispc_device *dispc, u16 idx, u32 val)

drivers/gpu/drm/omapdrm/dss/dispc.c

3605

void dispc_mgr_set_clock_div(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

361

static inline u32 dispc_read_reg(struct dispc_device *dispc, u16 idx)

drivers/gpu/drm/omapdrm/dss/dispc.c

3616

u32 dispc_read_irqstatus(struct dispc_device *dispc)

drivers/gpu/drm/omapdrm/dss/dispc.c

3621

void dispc_clear_irqstatus(struct dispc_device *dispc, u32 mask)

drivers/gpu/drm/omapdrm/dss/dispc.c

3626

void dispc_write_irqenable(struct dispc_device *dispc, u32 mask)

drivers/gpu/drm/omapdrm/dss/dispc.c

3639

void dispc_enable_sidle(struct dispc_device *dispc)

drivers/gpu/drm/omapdrm/dss/dispc.c

3645

void dispc_disable_sidle(struct dispc_device *dispc)

drivers/gpu/drm/omapdrm/dss/dispc.c

3650

u32 dispc_mgr_gamma_size(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

366

static u32 mgr_fld_read(struct dispc_device *dispc, enum omap_channel channel,

drivers/gpu/drm/omapdrm/dss/dispc.c

3661

static void dispc_mgr_write_gamma_table(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

3682

static void dispc_restore_gamma_tables(struct dispc_device *dispc)

drivers/gpu/drm/omapdrm/dss/dispc.c

3705

void dispc_mgr_set_gamma(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

374

static void mgr_fld_write(struct dispc_device *dispc, enum omap_channel channel,

drivers/gpu/drm/omapdrm/dss/dispc.c

3753

static int dispc_init_gamma_tables(struct dispc_device *dispc)

drivers/gpu/drm/omapdrm/dss/dispc.c

3784

static void _omap_dispc_initial_config(struct dispc_device *dispc)

drivers/gpu/drm/omapdrm/dss/dispc.c

382

int dispc_get_num_ovls(struct dispc_device *dispc)

drivers/gpu/drm/omapdrm/dss/dispc.c

387

int dispc_get_num_mgrs(struct dispc_device *dispc)

drivers/gpu/drm/omapdrm/dss/dispc.c

39

struct dispc_device;

drivers/gpu/drm/omapdrm/dss/dispc.c

392

static void dispc_get_reg_field(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

402

static bool dispc_has_feature(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

420

static void dispc_save_context(struct dispc_device *dispc)

drivers/gpu/drm/omapdrm/dss/dispc.c

4367

struct dispc_device *dispc = arg;

drivers/gpu/drm/omapdrm/dss/dispc.c

4375

int dispc_request_irq(struct dispc_device *dispc, irq_handler_t handler,

drivers/gpu/drm/omapdrm/dss/dispc.c

4399

void dispc_free_irq(struct dispc_device *dispc, void *dev_id)

drivers/gpu/drm/omapdrm/dss/dispc.c

4407

u32 dispc_get_memory_bandwidth_limit(struct dispc_device *dispc)

drivers/gpu/drm/omapdrm/dss/dispc.c

4489

static int dispc_errata_i734_wa_init(struct dispc_device *dispc)

drivers/gpu/drm/omapdrm/dss/dispc.c

4508

static void dispc_errata_i734_wa_fini(struct dispc_device *dispc)

drivers/gpu/drm/omapdrm/dss/dispc.c

4517

static void dispc_errata_i734_wa(struct dispc_device *dispc)

drivers/gpu/drm/omapdrm/dss/dispc.c

4601

struct dispc_device *dispc;

drivers/gpu/drm/omapdrm/dss/dispc.c

4691

struct dispc_device *dispc = dev_get_drvdata(dev);

drivers/gpu/drm/omapdrm/dss/dispc.c

4722

struct dispc_device *dispc = dev_get_drvdata(dev);

drivers/gpu/drm/omapdrm/dss/dispc.c

4737

struct dispc_device *dispc = dev_get_drvdata(dev);

drivers/gpu/drm/omapdrm/dss/dispc.c

527

static noinline_for_stack void dispc_restore_context(struct dispc_device *dispc)

drivers/gpu/drm/omapdrm/dss/dispc.c

649

int dispc_runtime_get(struct dispc_device *dispc)

drivers/gpu/drm/omapdrm/dss/dispc.c

663

void dispc_runtime_put(struct dispc_device *dispc)

drivers/gpu/drm/omapdrm/dss/dispc.c

673

u32 dispc_mgr_get_vsync_irq(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

679

u32 dispc_mgr_get_framedone_irq(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

688

u32 dispc_mgr_get_sync_lost_irq(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

694

void dispc_mgr_enable(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

702

static bool dispc_mgr_is_enabled(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

708

bool dispc_mgr_go_busy(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

714

void dispc_mgr_go(struct dispc_device *dispc, enum omap_channel channel)

drivers/gpu/drm/omapdrm/dss/dispc.c

724

static void dispc_ovl_write_firh_reg(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

731

static void dispc_ovl_write_firhv_reg(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

738

static void dispc_ovl_write_firv_reg(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

745

static void dispc_ovl_write_firh2_reg(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

754

static void dispc_ovl_write_firhv2_reg(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

763

static void dispc_ovl_write_firv2_reg(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

772

static void dispc_ovl_set_scale_coef(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

829

static void dispc_ovl_write_color_conv_coef(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

878

static void dispc_ovl_set_csc(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

904

static void dispc_ovl_set_ba0(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

910

static void dispc_ovl_set_ba1(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

916

static void dispc_ovl_set_ba0_uv(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

922

static void dispc_ovl_set_ba1_uv(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

928

static void dispc_ovl_set_pos(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

942

static void dispc_ovl_set_input_size(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

954

static void dispc_ovl_set_output_size(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

970

static void dispc_ovl_set_zorder(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dispc.c

980

static void dispc_ovl_enable_zorder_planes(struct dispc_device *dispc)

drivers/gpu/drm/omapdrm/dss/dispc.c

991

static void dispc_ovl_set_pre_mult_alpha(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dss.h

17

struct dispc_device;

drivers/gpu/drm/omapdrm/dss/dss.h

259

struct dispc_device *dispc;

drivers/gpu/drm/omapdrm/dss/dss.h

389

void dispc_dump_clocks(struct dispc_device *dispc, struct seq_file *s);

drivers/gpu/drm/omapdrm/dss/dss.h

391

int dispc_runtime_get(struct dispc_device *dispc);

drivers/gpu/drm/omapdrm/dss/dss.h

392

void dispc_runtime_put(struct dispc_device *dispc);

drivers/gpu/drm/omapdrm/dss/dss.h

394

int dispc_get_num_ovls(struct dispc_device *dispc);

drivers/gpu/drm/omapdrm/dss/dss.h

395

int dispc_get_num_mgrs(struct dispc_device *dispc);

drivers/gpu/drm/omapdrm/dss/dss.h

397

const u32 *dispc_ovl_get_color_modes(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dss.h

400

void dispc_ovl_get_max_size(struct dispc_device *dispc, u16 *width, u16 *height);

drivers/gpu/drm/omapdrm/dss/dss.h

401

bool dispc_ovl_color_mode_supported(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dss.h

403

enum omap_overlay_caps dispc_ovl_get_caps(struct dispc_device *dispc, enum omap_plane_id plane);

drivers/gpu/drm/omapdrm/dss/dss.h

405

u32 dispc_read_irqstatus(struct dispc_device *dispc);

drivers/gpu/drm/omapdrm/dss/dss.h

406

void dispc_clear_irqstatus(struct dispc_device *dispc, u32 mask);

drivers/gpu/drm/omapdrm/dss/dss.h

407

void dispc_write_irqenable(struct dispc_device *dispc, u32 mask);

drivers/gpu/drm/omapdrm/dss/dss.h

409

int dispc_request_irq(struct dispc_device *dispc, irq_handler_t handler,

drivers/gpu/drm/omapdrm/dss/dss.h

411

void dispc_free_irq(struct dispc_device *dispc, void *dev_id);

drivers/gpu/drm/omapdrm/dss/dss.h

413

u32 dispc_mgr_get_vsync_irq(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dss.h

415

u32 dispc_mgr_get_framedone_irq(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dss.h

417

u32 dispc_mgr_get_sync_lost_irq(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dss.h

420

u32 dispc_get_memory_bandwidth_limit(struct dispc_device *dispc);

drivers/gpu/drm/omapdrm/dss/dss.h

422

void dispc_mgr_enable(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dss.h

425

bool dispc_mgr_go_busy(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dss.h

428

void dispc_mgr_go(struct dispc_device *dispc, enum omap_channel channel);

drivers/gpu/drm/omapdrm/dss/dss.h

430

void dispc_mgr_set_lcd_config(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dss.h

433

void dispc_mgr_set_timings(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dss.h

436

void dispc_mgr_setup(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dss.h

440

int dispc_mgr_check_timings(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dss.h

444

u32 dispc_mgr_gamma_size(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dss.h

446

void dispc_mgr_set_gamma(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dss.h

451

int dispc_ovl_setup(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dss.h

457

int dispc_ovl_enable(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dss.h

460

void dispc_enable_sidle(struct dispc_device *dispc);

drivers/gpu/drm/omapdrm/dss/dss.h

461

void dispc_disable_sidle(struct dispc_device *dispc);

drivers/gpu/drm/omapdrm/dss/dss.h

463

void dispc_lcd_enable_signal(struct dispc_device *dispc, bool enable);

drivers/gpu/drm/omapdrm/dss/dss.h

464

void dispc_pck_free_enable(struct dispc_device *dispc, bool enable);

drivers/gpu/drm/omapdrm/dss/dss.h

468

bool dispc_div_calc(struct dispc_device *dispc, unsigned long dispc_freq,

drivers/gpu/drm/omapdrm/dss/dss.h

472

int dispc_calc_clock_rates(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dss.h

477

void dispc_ovl_set_fifo_threshold(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dss.h

479

void dispc_ovl_compute_fifo_thresholds(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dss.h

484

void dispc_mgr_set_clock_div(struct dispc_device *dispc,

drivers/gpu/drm/omapdrm/dss/dss.h

487

void dispc_set_tv_pclk(struct dispc_device *dispc, unsigned long pclk);

drivers/gpu/drm/omapdrm/dss/omapdss.h

308

struct dispc_device *dispc_get_dispc(struct dss_device *dss);

drivers/gpu/drm/omapdrm/dss/omapdss.h

51

struct dispc_device;

drivers/gpu/drm/omapdrm/omap_drv.h

64

struct dispc_device *dispc;

drivers/gpu/drm/tidss/tidss_crtc.c

92

struct dispc_device *dispc = tidss->dispc;

drivers/gpu/drm/tidss/tidss_dispc.c

1004

struct dispc_bus_format *dispc_vp_find_bus_fmt(struct dispc_device *dispc,

drivers/gpu/drm/tidss/tidss_dispc.c

1018

int dispc_vp_bus_check(struct dispc_device *dispc, u32 hw_videoport,

drivers/gpu/drm/tidss/tidss_dispc.c

1044

static void dispc_am65x_oldi_tx_power(struct dispc_device *dispc, bool power)

drivers/gpu/drm/tidss/tidss_dispc.c

1063

static void dispc_set_num_datalines(struct dispc_device *dispc,

drivers/gpu/drm/tidss/tidss_dispc.c

1090

static void dispc_enable_am65x_oldi(struct dispc_device *dispc, u32 hw_videoport,

drivers/gpu/drm/tidss/tidss_dispc.c

1128

void dispc_vp_prepare(struct dispc_device *dispc, u32 hw_videoport,

drivers/gpu/drm/tidss/tidss_dispc.c

1205

void dispc_vp_enable(struct dispc_device *dispc, u32 hw_videoport)

drivers/gpu/drm/tidss/tidss_dispc.c

1211

void dispc_vp_disable(struct dispc_device *dispc, u32 hw_videoport)

drivers/gpu/drm/tidss/tidss_dispc.c

1217

void dispc_vp_unprepare(struct dispc_device *dispc, u32 hw_videoport)

drivers/gpu/drm/tidss/tidss_dispc.c

1226

bool dispc_vp_go_busy(struct dispc_device *dispc, u32 hw_videoport)

drivers/gpu/drm/tidss/tidss_dispc.c

1232

void dispc_vp_go(struct dispc_device *dispc, u32 hw_videoport)

drivers/gpu/drm/tidss/tidss_dispc.c

1280

static void dispc_vp_set_default_color(struct dispc_device *dispc,

drivers/gpu/drm/tidss/tidss_dispc.c

1304

static int check_pixel_clock(struct dispc_device *dispc, u32 hw_videoport,

drivers/gpu/drm/tidss/tidss_dispc.c

1327

enum drm_mode_status dispc_vp_mode_valid(struct dispc_device *dispc,

drivers/gpu/drm/tidss/tidss_dispc.c

1395

int dispc_vp_enable_clk(struct dispc_device *dispc, u32 hw_videoport)

drivers/gpu/drm/tidss/tidss_dispc.c

1406

void dispc_vp_disable_clk(struct dispc_device *dispc, u32 hw_videoport)

drivers/gpu/drm/tidss/tidss_dispc.c

1411

int dispc_vp_set_clk_rate(struct dispc_device *dispc, u32 hw_videoport,

drivers/gpu/drm/tidss/tidss_dispc.c

1438

static void dispc_k2g_ovr_set_plane(struct dispc_device *dispc,

drivers/gpu/drm/tidss/tidss_dispc.c

1447

static void dispc_am65x_ovr_set_plane(struct dispc_device *dispc,

drivers/gpu/drm/tidss/tidss_dispc.c

1461

static void dispc_j721e_ovr_set_plane(struct dispc_device *dispc,

drivers/gpu/drm/tidss/tidss_dispc.c

1475

void dispc_ovr_set_plane(struct dispc_device *dispc, u32 hw_plane,

drivers/gpu/drm/tidss/tidss_dispc.c

1500

void dispc_ovr_enable_layer(struct dispc_device *dispc,

drivers/gpu/drm/tidss/tidss_dispc.c

1589

static void dispc_k2g_vid_write_csc(struct dispc_device *dispc, u32 hw_plane,

drivers/gpu/drm/tidss/tidss_dispc.c

1612

static void dispc_k3_vid_write_csc(struct dispc_device *dispc, u32 hw_plane,

drivers/gpu/drm/tidss/tidss_dispc.c

1709

static void dispc_vid_csc_setup(struct dispc_device *dispc, u32 hw_plane,

drivers/gpu/drm/tidss/tidss_dispc.c

1727

static void dispc_vid_csc_enable(struct dispc_device *dispc, u32 hw_plane,

drivers/gpu/drm/tidss/tidss_dispc.c

1748

static void dispc_vid_write_fir_coefs(struct dispc_device *dispc,

drivers/gpu/drm/tidss/tidss_dispc.c

1818

static int dispc_vid_calc_scaling(struct dispc_device *dispc,

drivers/gpu/drm/tidss/tidss_dispc.c

1982

static void dispc_vid_set_scaling(struct dispc_device *dispc,

drivers/gpu/drm/tidss/tidss_dispc.c

2082

static void dispc_plane_set_pixel_format(struct dispc_device *dispc,

drivers/gpu/drm/tidss/tidss_dispc.c

2099

const u32 *dispc_plane_formats(struct dispc_device *dispc, unsigned int *len)

drivers/gpu/drm/tidss/tidss_dispc.c

2121

int dispc_plane_check(struct dispc_device *dispc, u32 hw_plane,

drivers/gpu/drm/tidss/tidss_dispc.c

2192

void dispc_plane_setup(struct dispc_device *dispc, u32 hw_plane,

drivers/gpu/drm/tidss/tidss_dispc.c

2279

void dispc_plane_enable(struct dispc_device *dispc, u32 hw_plane, bool enable)

drivers/gpu/drm/tidss/tidss_dispc.c

2285

static u32 dispc_vid_get_fifo_size(struct dispc_device *dispc, u32 hw_plane)

drivers/gpu/drm/tidss/tidss_dispc.c

2291

static void dispc_vid_set_mflag_threshold(struct dispc_device *dispc,

drivers/gpu/drm/tidss/tidss_dispc.c

2299

static void dispc_vid_set_buf_threshold(struct dispc_device *dispc,

drivers/gpu/drm/tidss/tidss_dispc.c

2309

static void dispc_k2g_plane_init(struct dispc_device *dispc)

drivers/gpu/drm/tidss/tidss_dispc.c

2361

static void dispc_k3_plane_init(struct dispc_device *dispc)

drivers/gpu/drm/tidss/tidss_dispc.c

2414

static void dispc_plane_init(struct dispc_device *dispc)

drivers/gpu/drm/tidss/tidss_dispc.c

2432

static void dispc_vp_init(struct dispc_device *dispc)

drivers/gpu/drm/tidss/tidss_dispc.c

2444

static void dispc_initial_config(struct dispc_device *dispc)

drivers/gpu/drm/tidss/tidss_dispc.c

2458

static void dispc_k2g_vp_write_gamma_table(struct dispc_device *dispc,

drivers/gpu/drm/tidss/tidss_dispc.c

2480

static void dispc_am65x_vp_write_gamma_table(struct dispc_device *dispc,

drivers/gpu/drm/tidss/tidss_dispc.c

2501

static void dispc_j721e_vp_write_gamma_table(struct dispc_device *dispc,

drivers/gpu/drm/tidss/tidss_dispc.c

2523

static void dispc_vp_write_gamma_table(struct dispc_device *dispc,

drivers/gpu/drm/tidss/tidss_dispc.c

2550

static void dispc_vp_set_gamma(struct dispc_device *dispc,

drivers/gpu/drm/tidss/tidss_dispc.c

2644

static void dispc_k2g_vp_write_csc(struct dispc_device *dispc, u32 hw_videoport,

drivers/gpu/drm/tidss/tidss_dispc.c

2661

static void dispc_k2g_vp_set_ctm(struct dispc_device *dispc, u32 hw_videoport,

drivers/gpu/drm/tidss/tidss_dispc.c

2709

static void dispc_k3_vp_write_csc(struct dispc_device *dispc, u32 hw_videoport,

drivers/gpu/drm/tidss/tidss_dispc.c

2727

static void dispc_k3_vp_set_ctm(struct dispc_device *dispc, u32 hw_videoport,

drivers/gpu/drm/tidss/tidss_dispc.c

2744

static void dispc_vp_set_color_mgmt(struct dispc_device *dispc,

drivers/gpu/drm/tidss/tidss_dispc.c

2772

void dispc_vp_setup(struct dispc_device *dispc, u32 hw_videoport,

drivers/gpu/drm/tidss/tidss_dispc.c

2779

int dispc_runtime_suspend(struct dispc_device *dispc)

drivers/gpu/drm/tidss/tidss_dispc.c

2790

int dispc_runtime_resume(struct dispc_device *dispc)

drivers/gpu/drm/tidss/tidss_dispc.c

2848

struct dispc_device *dispc)

drivers/gpu/drm/tidss/tidss_dispc.c

2863

static void dispc_init_errata(struct dispc_device *dispc)

drivers/gpu/drm/tidss/tidss_dispc.c

2880

static void dispc_softreset_k2g(struct dispc_device *dispc)

drivers/gpu/drm/tidss/tidss_dispc.c

2894

static int dispc_softreset(struct dispc_device *dispc)

drivers/gpu/drm/tidss/tidss_dispc.c

2917

static int dispc_init_hw(struct dispc_device *dispc)

drivers/gpu/drm/tidss/tidss_dispc.c

2964

struct dispc_device *dispc;

drivers/gpu/drm/tidss/tidss_dispc.c

482

static void dispc_write(struct dispc_device *dispc, u16 reg, u32 val)

drivers/gpu/drm/tidss/tidss_dispc.c

487

static u32 dispc_read(struct dispc_device *dispc, u16 reg)

drivers/gpu/drm/tidss/tidss_dispc.c

493

void dispc_vid_write(struct dispc_device *dispc, u32 hw_plane, u16 reg, u32 val)

drivers/gpu/drm/tidss/tidss_dispc.c

500

static u32 dispc_vid_read(struct dispc_device *dispc, u32 hw_plane, u16 reg)

drivers/gpu/drm/tidss/tidss_dispc.c

507

static void dispc_ovr_write(struct dispc_device *dispc, u32 hw_videoport,

drivers/gpu/drm/tidss/tidss_dispc.c

515

static u32 dispc_ovr_read(struct dispc_device *dispc, u32 hw_videoport, u16 reg)

drivers/gpu/drm/tidss/tidss_dispc.c

522

static void dispc_vp_write(struct dispc_device *dispc, u32 hw_videoport,

drivers/gpu/drm/tidss/tidss_dispc.c

530

static u32 dispc_vp_read(struct dispc_device *dispc, u32 hw_videoport, u16 reg)

drivers/gpu/drm/tidss/tidss_dispc.c

570

struct dispc_device *_dispc = (dispc); \

drivers/gpu/drm/tidss/tidss_dispc.c

582

struct dispc_device *_dispc = (dispc); \

drivers/gpu/drm/tidss/tidss_dispc.c

595

struct dispc_device *_dispc = (dispc); \

drivers/gpu/drm/tidss/tidss_dispc.c

605

struct dispc_device *_dispc = (dispc); \

drivers/gpu/drm/tidss/tidss_dispc.c

665

static dispc_irq_t dispc_k2g_vp_read_irqstatus(struct dispc_device *dispc,

drivers/gpu/drm/tidss/tidss_dispc.c

673

static void dispc_k2g_vp_write_irqstatus(struct dispc_device *dispc,

drivers/gpu/drm/tidss/tidss_dispc.c

681

static dispc_irq_t dispc_k2g_vid_read_irqstatus(struct dispc_device *dispc,

drivers/gpu/drm/tidss/tidss_dispc.c

689

static void dispc_k2g_vid_write_irqstatus(struct dispc_device *dispc,

drivers/gpu/drm/tidss/tidss_dispc.c

697

static dispc_irq_t dispc_k2g_vp_read_irqenable(struct dispc_device *dispc,

drivers/gpu/drm/tidss/tidss_dispc.c

705

static void dispc_k2g_vp_set_irqenable(struct dispc_device *dispc,

drivers/gpu/drm/tidss/tidss_dispc.c

713

static dispc_irq_t dispc_k2g_vid_read_irqenable(struct dispc_device *dispc,

drivers/gpu/drm/tidss/tidss_dispc.c

721

static void dispc_k2g_vid_set_irqenable(struct dispc_device *dispc,

drivers/gpu/drm/tidss/tidss_dispc.c

729

static void dispc_k2g_clear_irqstatus(struct dispc_device *dispc,

drivers/gpu/drm/tidss/tidss_dispc.c

737

dispc_irq_t dispc_k2g_read_and_clear_irqstatus(struct dispc_device *dispc)

drivers/gpu/drm/tidss/tidss_dispc.c

753

static dispc_irq_t dispc_k2g_read_irqenable(struct dispc_device *dispc)

drivers/gpu/drm/tidss/tidss_dispc.c

764

void dispc_k2g_set_irqenable(struct dispc_device *dispc, dispc_irq_t mask)

drivers/gpu/drm/tidss/tidss_dispc.c

783

static dispc_irq_t dispc_k3_vp_read_irqstatus(struct dispc_device *dispc,

drivers/gpu/drm/tidss/tidss_dispc.c

791

static void dispc_k3_vp_write_irqstatus(struct dispc_device *dispc,

drivers/gpu/drm/tidss/tidss_dispc.c

799

static dispc_irq_t dispc_k3_vid_read_irqstatus(struct dispc_device *dispc,

drivers/gpu/drm/tidss/tidss_dispc.c

808

static void dispc_k3_vid_write_irqstatus(struct dispc_device *dispc,

drivers/gpu/drm/tidss/tidss_dispc.c

817

static dispc_irq_t dispc_k3_vp_read_irqenable(struct dispc_device *dispc,

drivers/gpu/drm/tidss/tidss_dispc.c

825

static void dispc_k3_vp_set_irqenable(struct dispc_device *dispc,

drivers/gpu/drm/tidss/tidss_dispc.c

833

static dispc_irq_t dispc_k3_vid_read_irqenable(struct dispc_device *dispc,

drivers/gpu/drm/tidss/tidss_dispc.c

842

static void dispc_k3_vid_set_irqenable(struct dispc_device *dispc,

drivers/gpu/drm/tidss/tidss_dispc.c

852

void dispc_k3_clear_irqstatus(struct dispc_device *dispc, dispc_irq_t clearmask)

drivers/gpu/drm/tidss/tidss_dispc.c

874

dispc_irq_t dispc_k3_read_and_clear_irqstatus(struct dispc_device *dispc)

drivers/gpu/drm/tidss/tidss_dispc.c

890

static dispc_irq_t dispc_k3_read_irqenable(struct dispc_device *dispc)

drivers/gpu/drm/tidss/tidss_dispc.c

904

static void dispc_k3_set_irqenable(struct dispc_device *dispc,

drivers/gpu/drm/tidss/tidss_dispc.c

948

dispc_irq_t dispc_read_and_clear_irqstatus(struct dispc_device *dispc)

drivers/gpu/drm/tidss/tidss_dispc.c

965

void dispc_set_irqenable(struct dispc_device *dispc, dispc_irq_t mask)

drivers/gpu/drm/tidss/tidss_dispc.h

109

void dispc_set_irqenable(struct dispc_device *dispc, dispc_irq_t mask);

drivers/gpu/drm/tidss/tidss_dispc.h

110

dispc_irq_t dispc_read_and_clear_irqstatus(struct dispc_device *dispc);

drivers/gpu/drm/tidss/tidss_dispc.h

112

void dispc_ovr_set_plane(struct dispc_device *dispc, u32 hw_plane,

drivers/gpu/drm/tidss/tidss_dispc.h

114

void dispc_ovr_enable_layer(struct dispc_device *dispc,

drivers/gpu/drm/tidss/tidss_dispc.h

117

void dispc_vp_prepare(struct dispc_device *dispc, u32 hw_videoport,

drivers/gpu/drm/tidss/tidss_dispc.h

119

void dispc_vp_enable(struct dispc_device *dispc, u32 hw_videoport);

drivers/gpu/drm/tidss/tidss_dispc.h

120

void dispc_vp_disable(struct dispc_device *dispc, u32 hw_videoport);

drivers/gpu/drm/tidss/tidss_dispc.h

121

void dispc_vp_unprepare(struct dispc_device *dispc, u32 hw_videoport);

drivers/gpu/drm/tidss/tidss_dispc.h

122

bool dispc_vp_go_busy(struct dispc_device *dispc, u32 hw_videoport);

drivers/gpu/drm/tidss/tidss_dispc.h

123

void dispc_vp_go(struct dispc_device *dispc, u32 hw_videoport);

drivers/gpu/drm/tidss/tidss_dispc.h

124

int dispc_vp_bus_check(struct dispc_device *dispc, u32 hw_videoport,

drivers/gpu/drm/tidss/tidss_dispc.h

126

enum drm_mode_status dispc_vp_mode_valid(struct dispc_device *dispc,

drivers/gpu/drm/tidss/tidss_dispc.h

129

int dispc_vp_enable_clk(struct dispc_device *dispc, u32 hw_videoport);

drivers/gpu/drm/tidss/tidss_dispc.h

130

void dispc_vp_disable_clk(struct dispc_device *dispc, u32 hw_videoport);

drivers/gpu/drm/tidss/tidss_dispc.h

131

int dispc_vp_set_clk_rate(struct dispc_device *dispc, u32 hw_videoport,

drivers/gpu/drm/tidss/tidss_dispc.h

133

void dispc_vp_setup(struct dispc_device *dispc, u32 hw_videoport,

drivers/gpu/drm/tidss/tidss_dispc.h

136

int dispc_runtime_suspend(struct dispc_device *dispc);

drivers/gpu/drm/tidss/tidss_dispc.h

137

int dispc_runtime_resume(struct dispc_device *dispc);

drivers/gpu/drm/tidss/tidss_dispc.h

139

int dispc_plane_check(struct dispc_device *dispc, u32 hw_plane,

drivers/gpu/drm/tidss/tidss_dispc.h

14

struct dispc_device;

drivers/gpu/drm/tidss/tidss_dispc.h

142

void dispc_plane_setup(struct dispc_device *dispc, u32 hw_plane,

drivers/gpu/drm/tidss/tidss_dispc.h

145

void dispc_plane_enable(struct dispc_device *dispc, u32 hw_plane, bool enable);

drivers/gpu/drm/tidss/tidss_dispc.h

146

const u32 *dispc_plane_formats(struct dispc_device *dispc, unsigned int *len);

drivers/gpu/drm/tidss/tidss_drv.h

26

struct dispc_device *dispc;