drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_smu.c

320

void dcn31_smu_set_zstate_support(struct clk_mgr_internal *clk_mgr, enum dcn_zstate_support_state support)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_smu.h

268

void dcn31_smu_set_zstate_support(struct clk_mgr_internal *clk_mgr, enum dcn_zstate_support_state support);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_smu.c

339

void dcn314_smu_set_zstate_support(struct clk_mgr_internal *clk_mgr, enum dcn_zstate_support_state support)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn314/dcn314_smu.h

107

void dcn314_smu_set_zstate_support(struct clk_mgr_internal *clk_mgr, enum dcn_zstate_support_state support);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.c

361

void dcn35_smu_set_zstate_support(struct clk_mgr_internal *clk_mgr, enum dcn_zstate_support_state support)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.h

210

void dcn35_smu_set_zstate_support(struct clk_mgr_internal *clk_mgr, enum dcn_zstate_support_state support);

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_smu.c

336

void dcn42_smu_set_zstate_support(struct clk_mgr_internal *clk_mgr, enum dcn_zstate_support_state support)

drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_smu.h

183

void dcn42_smu_set_zstate_support(struct clk_mgr_internal *clk_mgr, enum dcn_zstate_support_state support);

drivers/gpu/drm/amd/display/dc/dc.h

751

enum dcn_zstate_support_state zstate_support;

drivers/gpu/drm/amd/display/dc/dml/dcn20/dcn20_fpu.c

1060

static enum dcn_zstate_support_state decide_zstate_support(struct dc *dc, struct dc_state *context)

drivers/gpu/drm/amd/display/dc/dml/dcn35/dcn35_fpu.c

577

enum dcn_zstate_support_state support = DCN_ZSTATE_SUPPORT_DISALLOW;

drivers/gpu/drm/amd/display/dc/dml/dcn351/dcn351_fpu.c

609

enum dcn_zstate_support_state support = DCN_ZSTATE_SUPPORT_DISALLOW;

drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource_fpu.c

15

enum dcn_zstate_support_state support = DCN_ZSTATE_SUPPORT_DISALLOW;