Symbol: dcn42_update_clocks_update_dpp_dto
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c
349
dcn42_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower);
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c
355
dcn42_update_clocks_update_dpp_dto(clk_mgr, context, safe_to_lower);
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.c
847
dcn42_update_clocks_update_dpp_dto(clk_mgr_int, context, safe_to_lower);
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn42/dcn42_clk_mgr.h
78
void dcn42_update_clocks_update_dpp_dto(struct clk_mgr_internal *clk_mgr, struct dc_state *context, bool safe_to_lower);