drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1079

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

110

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1231

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1272

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1320

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1339

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1355

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1389

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1408

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1537

struct dcn3_dpp *dpp,

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

180

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

228

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

405

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

46

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

552

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

600

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

618

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

636

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

654

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

669

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

700

struct dcn3_dpp *dpp,

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

731

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

759

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

788

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

818

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

860

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

887

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

89

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

913

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

929

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.h

31

container_of(dpp, struct dcn3_dpp, base)

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.h

580

bool dpp3_construct(struct dcn3_dpp *dpp3,

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c

131

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c

153

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c

164

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c

173

struct dcn3_dpp *dpp,

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c

209

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c

224

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c

312

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c

319

struct dcn3_dpp *dpp,

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c

381

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c

413

static void read_gamut_remap(struct dcn3_dpp *dpp,

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c

451

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c

46

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c

62

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c

85

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn32/dcn32_dpp.c

148

struct dcn3_dpp *dpp,

drivers/gpu/drm/amd/display/dc/dpp/dcn32/dcn32_dpp.h

31

bool dpp32_construct(struct dcn3_dpp *dpp3,

drivers/gpu/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.c

130

struct dcn3_dpp *dpp, struct dc_context *ctx,

drivers/gpu/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.c

147

void dpp35_set_fgcg(struct dcn3_dpp *dpp, bool enable)

drivers/gpu/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.h

57

bool dpp35_construct(struct dcn3_dpp *dpp3, struct dc_context *ctx,

drivers/gpu/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.h

62

void dpp35_set_fgcg(struct dcn3_dpp *dpp, bool enable);

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp.c

47

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

798

struct dcn3_dpp *dpp =

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

799

kzalloc_obj(struct dcn3_dpp);

drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

721

struct dcn3_dpp *dpp =

drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

722

kzalloc_obj(struct dcn3_dpp);

drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

659

struct dcn3_dpp *dpp = kzalloc_obj(struct dcn3_dpp);

drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

637

struct dcn3_dpp *dpp = kzalloc_obj(struct dcn3_dpp);

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

980

struct dcn3_dpp *dpp =

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

981

kzalloc_obj(struct dcn3_dpp);

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

1015

struct dcn3_dpp *dpp =

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

1016

kzalloc_obj(struct dcn3_dpp);

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

979

struct dcn3_dpp *dpp =

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

980

kzalloc_obj(struct dcn3_dpp);

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

972

struct dcn3_dpp *dpp =

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

973

kzalloc_obj(struct dcn3_dpp);

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

998

struct dcn3_dpp *dpp3 =

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

999

kzalloc_obj(struct dcn3_dpp);

drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

986

struct dcn3_dpp *dpp3 =

drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

987

kzalloc_obj(struct dcn3_dpp);

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

863

struct dcn3_dpp *dpp = kzalloc_obj(struct dcn3_dpp);

drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

843

struct dcn3_dpp *dpp = kzalloc_obj(struct dcn3_dpp);

drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

850

struct dcn3_dpp *dpp = kzalloc_obj(struct dcn3_dpp);