dib9000_risc_mem_write
dib9000_risc_mem_write(state, FE_MM_RW_SYNC, &i);
dib9000_risc_mem_write(state, FE_MM_W_CHANNEL_HEAD, b);
dib9000_risc_mem_write(state, FE_MM_W_CHANNEL_UNION, (u8 *) &ch);
dib9000_risc_mem_write(state, FE_MM_W_CHANNEL_CONTEXT, (u8 *) fe_info);
dib9000_risc_mem_write(state, FE_MM_W_FE_INFO, (u8 *) fe_info);
dib9000_risc_mem_write(state, FE_MM_W_COMPONENT_ACCESS, p);