dib7000p_read_word
value = dib7000p_read_word(state, 0);
dib7000p_read_word(state, 1284);
u16 irq_pending = dib7000p_read_word(state, 1284);
tmp = dib7000p_read_word(state, 509);
tmp = dib7000p_read_word(state, 771);
tmp = dib7000p_read_word(state, 509);
tmp = dib7000p_read_word(state, 26);
if ((value = dib7000p_read_word(st, 768)) != 0x01b3) {
if ((value = dib7000p_read_word(st, 769)) != 0x4000) {
u16 tps = dib7000p_read_word(state, 463);
u16 lock = dib7000p_read_word(state, 509);
*ber = (dib7000p_read_word(state, 500) << 16) | dib7000p_read_word(state, 501);
*unc = dib7000p_read_word(state, 506);
u16 val = dib7000p_read_word(state, 394);
val = dib7000p_read_word(state, 479);
val = dib7000p_read_word(state, 480);
smo_mode = (dib7000p_read_word(state, 235) & 0x0050) | (1 << 1);
u16 val = dib7000p_read_word(state, 235) & 0xffef;
buf[0] = dib7000p_read_word(state, 0x184);
buf[1] = dib7000p_read_word(state, 0x185);
n_overflow = (dib7000p_read_word(state, 1984) >> 1) & 0x1;
n_overflow = (dib7000p_read_word(state, 1984) >> 1) & 0x1;
n_empty = dib7000p_read_word(state, 1984) & 0x1;
read_word = dib7000p_read_word(state, 1987);
word = dib7000p_read_word(state, apb_address);
i = ((dib7000p_read_word(state, 72) >> 12) & 0x3);
word = dib7000p_read_word(state, 384 + i);
word = (dib7000p_read_word(state, 72) & ~(3 << 12)) | (word << 12);
reg = dib7000p_read_word(state, 1798) & ~((0x7) | (0x7 << 6) | (0x7 << 12));
reg = dib7000p_read_word(state, 1799) & ~((0x7 << 2) | (0x7 << 8));
reg = dib7000p_read_word(state, 1800) & ~((0x7) | (0x7 << 6) | (0x7 << 12));
reg = dib7000p_read_word(state, 1801) & ~((0x7 << 2) | (0x7 << 8));
reg = dib7000p_read_word(state, 1802) & ~((0x7) | (0x7 << 6) | (0x7 << 12));
u16 reg_774 = 0x3fff, reg_775 = 0xffff, reg_776 = 0x0007, reg_899 = 0x0003, reg_1280 = (0xfe00) | (dib7000p_read_word(state, 1280) & 0x01ff);
u16 reg_1287 = dib7000p_read_word(state, 1287);
u16 reg_1288 = dib7000p_read_word(state, 1288) & ~(0x7 << 7);
u16 reg_1288 = dib7000p_read_word(state, 1288) & ~(0x7 << 4);
reg_1287 = dib7000p_read_word(state, 1287);
smo_mode = (dib7000p_read_word(state, 235) & 0x0050) | (1 << 1);
outreg = dib7000p_read_word(state, 1286) & ~((1 << 10) | (0x7 << 6) | (1 << 1));
en_cur_state = dib7000p_read_word(state, 1922);
reg = dib7000p_read_word(state, 1794);
st->version = dib7000p_read_word(st, 897);
reg_908 = dib7000p_read_word(state, 908);
reg_909 = dib7000p_read_word(state, 909);
reg = dib7000p_read_word(state, 1925);
reg = dib7000p_read_word(state, 1925); /* read access to make it works... strange ... */
reg = dib7000p_read_word(state, 72) & ~((0x3 << 14) | (0x3 << 12));
reg = dib7000p_read_word(state, 1925);
return dib7000p_write_word(state, 105, (dib7000p_read_word(state, 105) & 0xf000) | value);
*agc_global = dib7000p_read_word(state, 394);
*agc1 = dib7000p_read_word(state, 392);
*agc2 = dib7000p_read_word(state, 393);
*wbd = dib7000p_read_word(state, 397);
while (((dib7000p_read_word(state, 1856) >> 15) & 0x1) != 1)
dib7000p_write_word(state, 1857, dib7000p_read_word(state, 1857) | (!bw->pll_bypass << 15));
u32 internal = (u32) dib7000p_read_word(state, 18) << 16;
internal |= (u32) dib7000p_read_word(state, 19);
u16 reg_1857, reg_1856 = dib7000p_read_word(state, 1856);
reg_1857 = dib7000p_read_word(state, 1857);
while (((dib7000p_read_word(state, 1856) >> 15) & 0x1) != 1)
st->gpio_dir = dib7000p_read_word(st, 1029);
st->gpio_val = dib7000p_read_word(st, 1030);
dib7000p_write_word(state, 1285, dib7000p_read_word(state, 1285) & ~(1 << 1));
tmp = dib7000p_read_word(state, 903);
tmp = dib7000p_read_word(state, 900);
dyn_gain = dib7000p_read_word(state, 394);
reg = dib7000p_read_word(state, 0x79b) & 0xff00;
reg = dib7000p_read_word(state, 0x780);
agc_split = (u8) dib7000p_read_word(state, 396); /* store the split value for the next time */
dib7000p_write_word(state, 78, dib7000p_read_word(state, 394)); /* set AGC gain start value */
u32 timf = (dib7000p_read_word(state, 427) << 16) | dib7000p_read_word(state, 428);