drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c

194

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c

215

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c

272

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c

298

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c

425

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c

448

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c

506

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c

524

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c

539

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c

587

struct dcn10_dpp *dpp,

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.c

97

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.h

1520

void dpp1_construct(struct dcn10_dpp *dpp1,

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp.h

31

container_of(dpp, struct dcn10_dpp, base)

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

161

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

181

static void read_gamut_remap(struct dcn10_dpp *dpp,

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

233

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

250

struct dcn10_dpp *dpp,

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

308

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

322

struct dcn10_dpp *dpp,

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

349

struct dcn10_dpp *dpp,

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

378

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

386

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

398

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

420

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

434

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

463

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

492

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

566

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

587

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

616

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

643

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

653

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

663

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

690

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

705

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

728

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

770

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

797

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

828

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

876

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_cm.c

89

struct dcn10_dpp *dpp,

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_dscl.c

161

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_dscl.c

180

struct dcn10_dpp *dpp,

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_dscl.c

241

struct dcn10_dpp *dpp,

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_dscl.c

279

struct dcn10_dpp *dpp,

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_dscl.c

459

static enum lb_memory_config dpp1_dscl_find_lb_memory_config(struct dcn10_dpp *dpp,

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_dscl.c

511

struct dcn10_dpp *dpp, const struct scaler_data *data)

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_dscl.c

587

static void dpp1_dscl_set_recout(struct dcn10_dpp *dpp,

drivers/gpu/drm/amd/display/dc/dpp/dcn10/dcn10_dpp_dscl.c

617

struct dcn10_dpp *dpp = TO_DCN10_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

604

struct dcn10_dpp *dpp =

drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c

605

kzalloc_obj(struct dcn10_dpp);