drivers/gpu/drm/amd/display/dc/dccg/dcn20/dcn20_dccg.c

200

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/dccg/dcn20/dcn20_dccg.c

216

dccg_dcn->dccg_shift = dccg_shift;

drivers/gpu/drm/amd/display/dc/dccg/dcn20/dcn20_dccg.c

40

dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name

drivers/gpu/drm/amd/display/dc/dccg/dcn20/dcn20_dccg.h

519

const struct dccg_shift *dccg_shift;

drivers/gpu/drm/amd/display/dc/dccg/dcn20/dcn20_dccg.h

547

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/dccg/dcn201/dcn201_dccg.c

40

dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name

drivers/gpu/drm/amd/display/dc/dccg/dcn201/dcn201_dccg.c

70

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/dccg/dcn201/dcn201_dccg.c

86

dccg_dcn->dccg_shift = dccg_shift;

drivers/gpu/drm/amd/display/dc/dccg/dcn201/dcn201_dccg.h

34

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/dccg/dcn21/dcn21_dccg.c

146

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/dccg/dcn21/dcn21_dccg.c

162

dccg_dcn->dccg_shift = dccg_shift;

drivers/gpu/drm/amd/display/dc/dccg/dcn21/dcn21_dccg.c

39

dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name

drivers/gpu/drm/amd/display/dc/dccg/dcn21/dcn21_dccg.h

32

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/dccg/dcn30/dcn30_dccg.c

102

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/dccg/dcn30/dcn30_dccg.c

118

dccg_dcn->dccg_shift = dccg_shift;

drivers/gpu/drm/amd/display/dc/dccg/dcn30/dcn30_dccg.c

127

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/dccg/dcn30/dcn30_dccg.c

143

dccg_dcn->dccg_shift = dccg_shift;

drivers/gpu/drm/amd/display/dc/dccg/dcn30/dcn30_dccg.c

38

dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name

drivers/gpu/drm/amd/display/dc/dccg/dcn30/dcn30_dccg.h

57

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/dccg/dcn30/dcn30_dccg.h

63

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/dccg/dcn301/dcn301_dccg.c

38

dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name

drivers/gpu/drm/amd/display/dc/dccg/dcn301/dcn301_dccg.c

61

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/dccg/dcn301/dcn301_dccg.c

77

dccg_dcn->dccg_shift = dccg_shift;

drivers/gpu/drm/amd/display/dc/dccg/dcn301/dcn301_dccg.h

62

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c

40

dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name

drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c

953

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c

969

dccg_dcn->dccg_shift = dccg_shift;

drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.h

168

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/dccg/dcn314/dcn314_dccg.c

417

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/dccg/dcn314/dcn314_dccg.c

42

dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name

drivers/gpu/drm/amd/display/dc/dccg/dcn314/dcn314_dccg.c

433

dccg_dcn->dccg_shift = dccg_shift;

drivers/gpu/drm/amd/display/dc/dccg/dcn314/dcn314_dccg.h

205

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/dccg/dcn32/dcn32_dccg.c

39

dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name

drivers/gpu/drm/amd/display/dc/dccg/dcn32/dcn32_dccg.c

429

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/dccg/dcn32/dcn32_dccg.c

445

dccg_dcn->dccg_shift = dccg_shift;

drivers/gpu/drm/amd/display/dc/dccg/dcn32/dcn32_dccg.h

122

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c

2784

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c

2804

dccg_dcn->dccg_shift = dccg_shift;

drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c

39

dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name

drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.h

247

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c

1003

dccg_dcn->dccg_shift = dccg_shift;

drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c

49

dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name

drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c

987

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.h

240

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/dccg/dcn42/dcn42_dccg.c

19

dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name

drivers/gpu/drm/amd/display/dc/dccg/dcn42/dcn42_dccg.c

349

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/dccg/dcn42/dcn42_dccg.c

365

dccg_dcn->dccg_shift = dccg_shift;

drivers/gpu/drm/amd/display/dc/dccg/dcn42/dcn42_dccg.h

268

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2583

pool->base.dccg = dccg2_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask);

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

675

static const struct dccg_shift dccg_shift = {

drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

1224

pool->base.dccg = dccg201_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask);

drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

555

static const struct dccg_shift dccg_shift = {

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

1554

pool->base.dccg = dccg21_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask);

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

229

static const struct dccg_shift dccg_shift = {

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

2599

pool->base.dccg = dccg30_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask);

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

660

static const struct dccg_shift dccg_shift = {

drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

1586

pool->base.dccg = dccg301_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask);

drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

590

static const struct dccg_shift dccg_shift = {

drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

1316

static const struct dccg_shift dccg_shift = {

drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

1492

pool->dccg = dccg30_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask);

drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

1260

static const struct dccg_shift dccg_shift = {

drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

1424

pool->dccg = dccg30_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask);

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

2215

pool->base.dccg = dccg31_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask);

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

705

static const struct dccg_shift dccg_shift = {

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

2134

pool->base.dccg = dccg314_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask);

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

712

static const struct dccg_shift dccg_shift = {

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

2167

pool->base.dccg = dccg31_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask);

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

704

static const struct dccg_shift dccg_shift = {

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

2039

pool->base.dccg = dccg31_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask);

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

699

static const struct dccg_shift dccg_shift = {

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

2526

pool->base.dccg = dccg32_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask);

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

558

static const struct dccg_shift dccg_shift = {

drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

2019

pool->base.dccg = dccg32_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask);

drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

548

static const struct dccg_shift dccg_shift = {

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

2172

pool->base.dccg = dccg35_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask);

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

562

static const struct dccg_shift dccg_shift = {

drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

2144

pool->base.dccg = dccg35_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask);

drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

542

static const struct dccg_shift dccg_shift = {

drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

2142

pool->base.dccg = dccg35_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask);

drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

549

static const struct dccg_shift dccg_shift = {

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

2229

pool->base.dccg = dccg401_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask);

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

528

static const struct dccg_shift dccg_shift = {

drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c

2217

pool->base.dccg = dccg42_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask);

drivers/gpu/drm/amd/display/dc/resource/dcn42/dcn42_resource.c

484

static const struct dccg_shift dccg_shift = {

drivers/gpu/drm/amd/display/dc/resource/dcn42b/dcn42b_resource.c

2169

pool->base.dccg = dccg42_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask);

drivers/gpu/drm/amd/display/dc/resource/dcn42b/dcn42b_resource.c

508

static const struct dccg_shift dccg_shift = {