devm_clk_hw_register_divider_parent_hw
hw = devm_clk_hw_register_divider_parent_hw(dev, div_data->name,
hw = devm_clk_hw_register_divider_parent_hw(dev, div_data->name,
pll_out_div = devm_clk_hw_register_divider_parent_hw(dev, clk_name,
pll_bit = devm_clk_hw_register_divider_parent_hw(dev, clk_name,
hw = devm_clk_hw_register_divider_parent_hw(dev, clk_name, pclk_mux,
analog_postdiv = devm_clk_hw_register_divider_parent_hw(dev, clk_name,
hw = devm_clk_hw_register_divider_parent_hw(dev, clk_name,
hw = devm_clk_hw_register_divider_parent_hw(dev, clk_name,
pll_out_div = devm_clk_hw_register_divider_parent_hw(dev, clk_name,
pll_bit = devm_clk_hw_register_divider_parent_hw(dev, clk_name,
hw = devm_clk_hw_register_divider_parent_hw(dev, clk_name,