devm_clk_hw_register_divider
hw = devm_clk_hw_register_divider(dev, p->name,
hws[PLL_TV_A] = devm_clk_hw_register_divider(dev, "plltv_a", "plltv", 0,
hw = devm_clk_hw_register_divider(dev, "hdmi_ref", "tvdpll_594m", 0,
return devm_clk_hw_register_divider(dev, name, parent, CLK_SET_RATE_PARENT,
return devm_clk_hw_register_divider(dev, name, parent,
clk_hw = devm_clk_hw_register_divider(dev, core->name,
clk_wzrd->clks_internal[wzrd_clk_mul_div] = devm_clk_hw_register_divider
clkout_hw = devm_clk_hw_register_divider(dev, "clkout", __clk_get_name(st->clkin),
data->clk_prescaler = devm_clk_hw_register_divider(
data->clk_scaler = devm_clk_hw_register_divider(