ddr_pmu
struct ddr_pmu *pmu = to_ddr_pmu(event->pmu);
struct ddr_pmu *pmu = to_ddr_pmu(event->pmu);
struct ddr_pmu *pmu = to_ddr_pmu(event->pmu);
struct ddr_pmu *pmu = dev_get_drvdata(dev);
struct ddr_pmu *ddr_pmu = to_ddr_pmu(pmu);
const u64 *capability = ddr_pmu->info.hw_info->capability;
struct ddr_pmu *pmu = dev_get_drvdata(dev);
#define to_ddr_pmu(p) container_of(p, struct ddr_pmu, pmu)
struct ddr_pmu *pmu;
#define dmc_info_to_pmu(p) container_of(p, struct ddr_pmu, info)
static void dmc_pmu_enable(struct ddr_pmu *pmu)
struct ddr_pmu *pmu = hlist_entry_safe(node, struct ddr_pmu, node);
static void fill_event_attr(struct ddr_pmu *pmu)
static void dmc_pmu_disable(struct ddr_pmu *pmu)
struct ddr_pmu *pmu;
pmu = devm_kzalloc(&pdev->dev, sizeof(struct ddr_pmu), GFP_KERNEL);
*pmu = (struct ddr_pmu) {
struct ddr_pmu *pmu = platform_get_drvdata(pdev);
struct ddr_pmu *pmu = to_ddr_pmu(event->pmu);
struct ddr_pmu *pmu = to_ddr_pmu(event->pmu);
struct ddr_pmu *pmu = dev_get_drvdata(dev);
struct ddr_pmu *pmu = dev_get_drvdata(dev);
static u32 ddr_perf_filter_cap_get(struct ddr_pmu *pmu, int cap)
struct ddr_pmu *pmu = dev_get_drvdata(dev);
struct ddr_pmu *pmu = dev_get_drvdata(dev);
struct ddr_pmu *pmu = dev_get_drvdata(dev);
struct ddr_pmu *pmu = to_ddr_pmu(event->pmu);
static u32 ddr_perf_alloc_counter(struct ddr_pmu *pmu, int event)
static void ddr_perf_free_counter(struct ddr_pmu *pmu, int counter)
static u32 ddr_perf_read_counter(struct ddr_pmu *pmu, int counter)
struct ddr_pmu *pmu = to_ddr_pmu(event->pmu);
static void ddr_perf_counter_enable(struct ddr_pmu *pmu, int config,
static bool ddr_perf_counter_overflow(struct ddr_pmu *pmu, int counter)
#define to_ddr_pmu(p) container_of(p, struct ddr_pmu, pmu)
static void ddr_perf_counter_clear(struct ddr_pmu *pmu, int counter)
struct ddr_pmu *pmu = to_ddr_pmu(event->pmu);
struct ddr_pmu *pmu = to_ddr_pmu(event->pmu);
struct ddr_pmu *pmu = to_ddr_pmu(event->pmu);
struct ddr_pmu *pmu = to_ddr_pmu(event->pmu);
struct ddr_pmu *pmu = to_ddr_pmu(event->pmu);
static void ddr_perf_init(struct ddr_pmu *pmu, void __iomem *base,
*pmu = (struct ddr_pmu) {
struct ddr_pmu *pmu = (struct ddr_pmu *) p;
struct ddr_pmu *pmu = hlist_entry_safe(node, struct ddr_pmu, node);
struct ddr_pmu *pmu;
struct ddr_pmu *pmu = platform_get_drvdata(pdev);
static inline bool axi_filter_v1(struct ddr_pmu *pmu)
static inline bool axi_filter_v2(struct ddr_pmu *pmu)
struct ddr_pmu *pmu = dev_get_drvdata(dev);
struct ddr_pmu *pmu = dev_get_drvdata(dev);
struct ddr_pmu *ddr_pmu = to_ddr_pmu(pmu);
if (eattr->devtype_data != ddr_pmu->devtype_data &&
eattr->devtype_data->filter_ver != ddr_pmu->devtype_data->filter_ver)
static void ddr_perf_clear_counter(struct ddr_pmu *pmu, int counter)
static u64 ddr_perf_read_counter(struct ddr_pmu *pmu, int counter)
static void ddr_perf_counter_global_config(struct ddr_pmu *pmu, bool enable)
static void ddr_perf_counter_local_config(struct ddr_pmu *pmu, int config,
static void imx93_ddr_perf_monitor_config(struct ddr_pmu *pmu, int event,
static void imx95_ddr_perf_monitor_config(struct ddr_pmu *pmu, int event,
struct ddr_pmu *pmu = to_ddr_pmu(event->pmu);
struct ddr_pmu *pmu = to_ddr_pmu(event->pmu);
#define to_ddr_pmu(p) container_of(p, struct ddr_pmu, pmu)
struct ddr_pmu *pmu = to_ddr_pmu(event->pmu);
static int ddr_perf_alloc_counter(struct ddr_pmu *pmu, int event, int counter)
struct ddr_pmu *pmu = to_ddr_pmu(event->pmu);
struct ddr_pmu *pmu = to_ddr_pmu(event->pmu);
struct ddr_pmu *pmu = to_ddr_pmu(event->pmu);
struct ddr_pmu *ddr_pmu = to_ddr_pmu(pmu);
ddr_perf_counter_global_config(ddr_pmu, true);
struct ddr_pmu *ddr_pmu = to_ddr_pmu(pmu);
ddr_perf_counter_global_config(ddr_pmu, false);
static void ddr_perf_init(struct ddr_pmu *pmu, void __iomem *base,
*pmu = (struct ddr_pmu) {
struct ddr_pmu *pmu = (struct ddr_pmu *)p;
struct ddr_pmu *pmu = hlist_entry_safe(node, struct ddr_pmu, node);
struct ddr_pmu *pmu;
struct ddr_pmu *pmu = platform_get_drvdata(pdev);
ddr_pmu->dev = &pdev->dev;
platform_set_drvdata(pdev, ddr_pmu);
ddr_pmu->base = base;
ddr_pmu->p_data = dev_data;
is_cn10k = ddr_pmu->p_data->is_cn10k;
is_ody = ddr_pmu->p_data->is_ody;
ddr_pmu->ops = &ddr_pmu_ops;
writeq_relaxed(OP_MODE_CTRL_VAL_MANUAL, ddr_pmu->base +
ddr_pmu->p_data->cnt_op_mode_ctrl);
ddr_pmu->pmu = (struct pmu) {
ddr_pmu->ops = &ddr_pmu_ody_ops;
ddr_pmu->pmu = (struct pmu) {
ddr_pmu->cpu = raw_smp_processor_id();
name = devm_kasprintf(ddr_pmu->dev, GFP_KERNEL, "mrvl_ddr_pmu_%llx",
hrtimer_setup(&ddr_pmu->hrtimer, cn10k_ddr_pmu_timer_handler, CLOCK_MONOTONIC,
&ddr_pmu->node);
ret = perf_pmu_register(&ddr_pmu->pmu, name, -1);
&ddr_pmu->node);
struct cn10k_ddr_pmu *ddr_pmu = platform_get_drvdata(pdev);
&ddr_pmu->node);
perf_pmu_unregister(&ddr_pmu->pmu);
struct cn10k_ddr_pmu *ddr_pmu)
if (!ddr_pmu->p_data->is_ody) {
static void cn10k_ddr_perf_counter_start(struct cn10k_ddr_pmu *ddr_pmu,
const struct ddr_pmu_platform_data *p_data = ddr_pmu->p_data;
writeq_relaxed(START_OP_CTRL_VAL_START, ddr_pmu->base +
static void cn10k_ddr_perf_counter_stop(struct cn10k_ddr_pmu *ddr_pmu,
const struct ddr_pmu_platform_data *p_data = ddr_pmu->p_data;
writeq_relaxed(END_OP_CTRL_VAL_END, ddr_pmu->base +
struct cn10k_ddr_pmu *ddr_pmu = to_cn10k_ddr_pmu(pmu);
const struct ddr_pmu_platform_data *p_data = ddr_pmu->p_data;
writeq_relaxed(START_OP_CTRL_VAL_START, ddr_pmu->base +
struct cn10k_ddr_pmu *ddr_pmu = to_cn10k_ddr_pmu(pmu);
const struct ddr_pmu_platform_data *p_data = ddr_pmu->p_data;
writeq_relaxed(END_OP_CTRL_VAL_END, ddr_pmu->base +
struct cn10k_ddr_pmu *ddr_pmu;
ddr_pmu = devm_kzalloc(&pdev->dev, sizeof(*ddr_pmu), GFP_KERNEL);
if (!ddr_pmu)