drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c

124

ddc->regs = &ddc_clk_regs[en];

drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c

125

ddc->base.regs = &ddc_clk_regs[en].gpio;

drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c

93

static const struct ddc_registers ddc_clk_regs[] = {

drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c

94

ddc_clk_regs(1),

drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c

95

ddc_clk_regs(2),

drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c

96

ddc_clk_regs(3),

drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c

97

ddc_clk_regs(4),

drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c

98

ddc_clk_regs(5),

drivers/gpu/drm/amd/display/dc/gpio/dce110/hw_factory_dce110.c

99

ddc_clk_regs(6),

drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c

110

static const struct ddc_registers ddc_clk_regs[] = {

drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c

111

ddc_clk_regs(1),

drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c

112

ddc_clk_regs(2),

drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c

113

ddc_clk_regs(3),

drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c

114

ddc_clk_regs(4),

drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c

115

ddc_clk_regs(5),

drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c

116

ddc_clk_regs(6),

drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c

141

ddc->regs = &ddc_clk_regs[en];

drivers/gpu/drm/amd/display/dc/gpio/dce120/hw_factory_dce120.c

142

ddc->base.regs = &ddc_clk_regs[en].gpio;

drivers/gpu/drm/amd/display/dc/gpio/dce60/hw_factory_dce60.c

100

ddc_clk_regs(3),

drivers/gpu/drm/amd/display/dc/gpio/dce60/hw_factory_dce60.c

101

ddc_clk_regs(4),

drivers/gpu/drm/amd/display/dc/gpio/dce60/hw_factory_dce60.c

102

ddc_clk_regs(5),

drivers/gpu/drm/amd/display/dc/gpio/dce60/hw_factory_dce60.c

103

ddc_clk_regs(6),

drivers/gpu/drm/amd/display/dc/gpio/dce60/hw_factory_dce60.c

128

ddc->regs = &ddc_clk_regs[en];

drivers/gpu/drm/amd/display/dc/gpio/dce60/hw_factory_dce60.c

129

ddc->base.regs = &ddc_clk_regs[en].gpio;

drivers/gpu/drm/amd/display/dc/gpio/dce60/hw_factory_dce60.c

97

static const struct ddc_registers ddc_clk_regs[] = {

drivers/gpu/drm/amd/display/dc/gpio/dce60/hw_factory_dce60.c

98

ddc_clk_regs(1),

drivers/gpu/drm/amd/display/dc/gpio/dce60/hw_factory_dce60.c

99

ddc_clk_regs(2),

drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c

100

ddc_clk_regs(3),

drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c

101

ddc_clk_regs(4),

drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c

102

ddc_clk_regs(5),

drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c

103

ddc_clk_regs(6),

drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c

128

ddc->regs = &ddc_clk_regs[en];

drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c

129

ddc->base.regs = &ddc_clk_regs[en].gpio;

drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c

97

static const struct ddc_registers ddc_clk_regs[] = {

drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c

98

ddc_clk_regs(1),

drivers/gpu/drm/amd/display/dc/gpio/dce80/hw_factory_dce80.c

99

ddc_clk_regs(2),

drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c

106

static const struct ddc_registers ddc_clk_regs[] = {

drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c

107

ddc_clk_regs(1),

drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c

108

ddc_clk_regs(2),

drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c

109

ddc_clk_regs(3),

drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c

110

ddc_clk_regs(4),

drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c

111

ddc_clk_regs(5),

drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c

112

ddc_clk_regs(6),

drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c

173

ddc->regs = &ddc_clk_regs[en];

drivers/gpu/drm/amd/display/dc/gpio/dcn10/hw_factory_dcn10.c

174

ddc->base.regs = &ddc_clk_regs[en].gpio;