drivers/gpu/drm/imx/dcss/dcss-dtg.c

216

dcss_dtg_write(dtg, ((dtg_lrc_y << TC_Y_POS) | dtg_lrc_x),

drivers/gpu/drm/imx/dcss/dcss-dtg.c

218

dcss_dtg_write(dtg, ((dis_ulc_y << TC_Y_POS) | dis_ulc_x),

drivers/gpu/drm/imx/dcss/dcss-dtg.c

220

dcss_dtg_write(dtg, ((dis_lrc_y << TC_Y_POS) | dis_lrc_x),

drivers/gpu/drm/imx/dcss/dcss-dtg.c

231

dcss_dtg_write(dtg, sb_ctxld_trig | db_ctxld_trig, DCSS_DTG_TC_CTXLD);

drivers/gpu/drm/imx/dcss/dcss-dtg.c

234

dcss_dtg_write(dtg, 0, DCSS_DTG_LINE1_INT);

drivers/gpu/drm/imx/dcss/dcss-dtg.c

237

dcss_dtg_write(dtg, ((90 * dis_lrc_y) / 100) << 16, DCSS_DTG_LINE0_INT);

drivers/gpu/drm/imx/dcss/dcss-dtg.c

252

dcss_dtg_write(dtg, 0, DCSS_DTG_TC_CH1_TOP + 0x8 * ch_num);

drivers/gpu/drm/imx/dcss/dcss-dtg.c

253

dcss_dtg_write(dtg, 0, DCSS_DTG_TC_CH1_BOT + 0x8 * ch_num);

drivers/gpu/drm/imx/dcss/dcss-dtg.c

255

dcss_dtg_write(dtg, ((p_ulc_y << TC_Y_POS) | p_ulc_x),

drivers/gpu/drm/imx/dcss/dcss-dtg.c

257

dcss_dtg_write(dtg, ((p_lrc_y << TC_Y_POS) | p_lrc_x),

drivers/gpu/drm/imx/dcss/dcss-dtg.c

302

dcss_dtg_write(dtg, dtg->control_status, DCSS_DTG_TC_CONTROL_STATUS);

drivers/gpu/drm/imx/dcss/dcss-dtg.c

334

dcss_dtg_write(dtg, control_status, DCSS_DTG_TC_CONTROL_STATUS);