Symbol: dcn_bw_no
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
1029
if ((v->dispclk_dppclk_support_per_ratio[0] == dcn_bw_yes && v->dispclk_dppclk_support_per_ratio[1] == dcn_bw_no) || (v->dispclk_dppclk_support_per_ratio[0] == v->dispclk_dppclk_support_per_ratio[1] && (v->total_number_of_active_dpp_per_ratio[0] < v->total_number_of_active_dpp_per_ratio[1] || (((v->total_number_of_active_dpp_per_ratio[0] == v->total_number_of_active_dpp_per_ratio[1]) && v->required_dispclk_per_ratio[0] <= 0.5 * v->required_dispclk_per_ratio[1]))))) {
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
1227
v->dcc_enabled_any_plane = dcn_bw_no;
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
133
v->scale_ratio_support = dcn_bw_no;
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
141
v->source_format_pixel_and_scan_support = dcn_bw_no;
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
1637
v->planes_with_room_to_increase_vstartup_vratio_prefetch_more_than4 = dcn_bw_no;
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
1638
v->planes_with_room_to_increase_vstartup_destination_line_times_for_prefetch_less_than2 = dcn_bw_no;
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
1639
v->v_ratio_prefetch_more_than4 = dcn_bw_no;
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
1640
v->destination_line_times_for_prefetch_less_than2 = dcn_bw_no;
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
1761
v->planes_with_room_to_increase_vstartup_prefetch_bw_less_than_active_bw = dcn_bw_no;
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
1771
if (v->max_rd_bandwidth <= v->return_bw && v->v_ratio_prefetch_more_than4 == dcn_bw_no && v->destination_line_times_for_prefetch_less_than2 == dcn_bw_no) {
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
1775
v->prefetch_mode_supported = dcn_bw_no;
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
1778
} while (!(v->prefetch_mode_supported == dcn_bw_yes || (v->planes_with_room_to_increase_vstartup_prefetch_bw_less_than_active_bw == dcn_bw_yes && v->planes_with_room_to_increase_vstartup_vratio_prefetch_more_than4 == dcn_bw_no && v->planes_with_room_to_increase_vstartup_destination_line_times_for_prefetch_less_than2 == dcn_bw_no)));
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
1809
v->allow_dram_clock_change_during_vblank[k] = dcn_bw_no;
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
1814
v->allow_dram_clock_change_during_vblank[k] = dcn_bw_no;
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
1815
v->allow_dram_self_refresh_during_vblank[k] = dcn_bw_no;
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
205
v->dcc_enabled_in_any_plane = dcn_bw_no;
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
235
v->bandwidth_support[i] = dcn_bw_no;
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
243
v->writeback_latency_support = dcn_bw_no;
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
246
v->writeback_latency_support = dcn_bw_no;
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
257
v->rob_support[i] = dcn_bw_no;
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
302
v->dio_support[i] = dcn_bw_no;
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
318
v->total_available_writeback_support = dcn_bw_no;
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
462
v->dispclk_dppclk_support[i][j] = dcn_bw_no;
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
481
v->dispclk_dppclk_support[i][j] = dcn_bw_no;
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
488
v->dispclk_dppclk_support[i][j] = dcn_bw_no;
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
501
v->viewport_size_support = dcn_bw_no;
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
512
v->total_available_pipes_support[i][j] = dcn_bw_no;
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
572
v->urgent_latency_support[i][j] = dcn_bw_no;
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
930
v->prefetch_supported_with_immediate_flip[i][j] = dcn_bw_no;
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
934
v->prefetch_supported_with_immediate_flip[i][j] = dcn_bw_no;
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
939
v->prefetch_supported_without_immediate_flip[i][j] = dcn_bw_no;
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
943
v->prefetch_supported_without_immediate_flip[i][j] = dcn_bw_no;
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
953
v->v_ratio_in_prefetch_supported_with_immediate_flip[i][j] = dcn_bw_no;
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
959
v->v_ratio_in_prefetch_supported_without_immediate_flip[i][j] = dcn_bw_no;
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
973
v->mode_support_with_immediate_flip[i][j] = dcn_bw_no;
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
979
v->mode_support_without_immediate_flip[i][j] = dcn_bw_no;
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
983
v->mode_support_with_immediate_flip[i][j] = dcn_bw_no;
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
984
v->mode_support_without_immediate_flip[i][j] = dcn_bw_no;
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calc_auto.c
999
v->immediate_flip_supported = dcn_bw_no;
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c
1004
pipe->plane_state->format, &bpe) ? dcn_bw_yes : dcn_bw_no;
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c
135
.odm_capability = dcn_bw_no,
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c
136
.dsc_capability = dcn_bw_no,
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c
139
.is_line_buffer_bpp_fixed = dcn_bw_no,
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c
157
.can_vstartup_lines_exceed_vsync_plus_back_porch_lines_minus_one = dcn_bw_no,
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c
158
.bug_forcing_luma_and_chroma_request_to_same_size_fixed = dcn_bw_no,
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c
889
v->synchronized_vblank = dcn_bw_no;
drivers/gpu/drm/amd/display/dc/dml/calcs/dcn_calcs.c
993
v->dcc_enable[input_idx] = pipe->plane_state->dcc.enable ? dcn_bw_yes : dcn_bw_no;