drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c

116

struct dcn401_dsc *dsc401 = TO_DCN401_DSC(dsc);

drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c

128

struct dcn401_dsc *dsc401 = TO_DCN401_DSC(dsc);

drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c

141

struct dcn401_dsc *dsc401 = TO_DCN401_DSC(dsc);

drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c

166

struct dcn401_dsc *dsc401 = TO_DCN401_DSC(dsc);

drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c

185

struct dcn401_dsc *dsc401 = TO_DCN401_DSC(dsc);

drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c

192

struct dcn401_dsc *dsc401 = TO_DCN401_DSC(dsc);

drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c

203

struct dcn401_dsc *dsc401 = TO_DCN401_DSC(dsc);

drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c

391

void dsc401_set_fgcg(struct dcn401_dsc *dsc401, bool enable)

drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c

48

void dsc401_construct(struct dcn401_dsc *dsc,

drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.c

98

struct dcn401_dsc *dsc401 = TO_DCN401_DSC(dsc);

drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.h

14

container_of(dsc, struct dcn401_dsc, base)

drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.h

328

void dsc401_construct(struct dcn401_dsc *dsc,

drivers/gpu/drm/amd/display/dc/dsc/dcn401/dcn401_dsc.h

335

void dsc401_set_fgcg(struct dcn401_dsc *dsc401, bool enable);

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1383

kfree(container_of(*dsc, struct dcn401_dsc, base));

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1607

struct dcn401_dsc *dsc =

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

1608

kzalloc_obj(struct dcn401_dsc);