drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1067

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

110

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1219

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1260

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1307

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1326

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1342

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1376

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1395

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

1524

struct dcn3_dpp *dpp,

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

180

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

228

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

405

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

46

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

543

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

591

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

608

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

625

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

642

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

657

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

688

struct dcn3_dpp *dpp,

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

719

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

747

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

776

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

806

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

848

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

875

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

89

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

901

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.c

917

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.h

31

container_of(dpp, struct dcn3_dpp, base)

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp.h

580

bool dpp3_construct(struct dcn3_dpp *dpp3,

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c

130

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c

149

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c

160

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c

169

struct dcn3_dpp *dpp,

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c

205

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c

220

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c

308

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c

315

struct dcn3_dpp *dpp,

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c

377

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c

409

static void read_gamut_remap(struct dcn3_dpp *dpp,

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c

447

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c

46

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c

62

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn30/dcn30_dpp_cm.c

84

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn32/dcn32_dpp.c

148

struct dcn3_dpp *dpp,

drivers/gpu/drm/amd/display/dc/dpp/dcn32/dcn32_dpp.h

31

bool dpp32_construct(struct dcn3_dpp *dpp3,

drivers/gpu/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.c

130

struct dcn3_dpp *dpp, struct dc_context *ctx,

drivers/gpu/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.c

147

void dpp35_set_fgcg(struct dcn3_dpp *dpp, bool enable)

drivers/gpu/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.h

57

bool dpp35_construct(struct dcn3_dpp *dpp3, struct dc_context *ctx,

drivers/gpu/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.h

62

void dpp35_set_fgcg(struct dcn3_dpp *dpp, bool enable);

drivers/gpu/drm/amd/display/dc/dpp/dcn401/dcn401_dpp.c

47

struct dcn3_dpp *dpp = TO_DCN30_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

756

struct dcn3_dpp *dpp =

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

757

kzalloc_obj(struct dcn3_dpp);

drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

720

struct dcn3_dpp *dpp =

drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

721

kzalloc_obj(struct dcn3_dpp);

drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

571

struct dcn3_dpp *dpp = kzalloc_obj(struct dcn3_dpp);

drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

549

struct dcn3_dpp *dpp = kzalloc_obj(struct dcn3_dpp);

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

937

struct dcn3_dpp *dpp =

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

938

kzalloc_obj(struct dcn3_dpp);

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

973

struct dcn3_dpp *dpp =

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

974

kzalloc_obj(struct dcn3_dpp);

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

936

struct dcn3_dpp *dpp =

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

937

kzalloc_obj(struct dcn3_dpp);

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

929

struct dcn3_dpp *dpp =

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

930

kzalloc_obj(struct dcn3_dpp);

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

956

struct dcn3_dpp *dpp3 =

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

957

kzalloc_obj(struct dcn3_dpp);

drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

950

struct dcn3_dpp *dpp3 =

drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

951

kzalloc_obj(struct dcn3_dpp);

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

827

struct dcn3_dpp *dpp = kzalloc_obj(struct dcn3_dpp);

drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

807

struct dcn3_dpp *dpp = kzalloc_obj(struct dcn3_dpp);

drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

814

struct dcn3_dpp *dpp = kzalloc_obj(struct dcn3_dpp);