Symbol: dcn35_smu_set_hard_min_dcfclk
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_clk_mgr.c
459
dcn35_smu_set_hard_min_dcfclk(clk_mgr, clk_mgr_base->clks.dcfclk_khz);
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn35/dcn35_smu.h
199
int dcn35_smu_set_hard_min_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_dcfclk_khz);