Symbol: dcn31_smu_set_hard_min_dcfclk
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_clk_mgr.c
204
dcn31_smu_set_hard_min_dcfclk(clk_mgr, clk_mgr_base->clks.dcfclk_khz);
drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/dcn31_smu.h
257
int dcn31_smu_set_hard_min_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_dcfclk_khz);