drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.h

44

void dcn20_update_mpcc(struct dc *dc, struct pipe_ctx *pipe_ctx);

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_init.c

110

.update_mpcc = dcn20_update_mpcc,

drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_init.c

113

.update_mpcc = dcn20_update_mpcc,

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_init.c

119

.update_mpcc = dcn20_update_mpcc,

drivers/gpu/drm/amd/display/dc/hwss/dcn301/dcn301_init.c

116

.update_mpcc = dcn20_update_mpcc,

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_init.c

121

.update_mpcc = dcn20_update_mpcc,

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_init.c

124

.update_mpcc = dcn20_update_mpcc,

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_init.c

130

.update_mpcc = dcn20_update_mpcc,

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_init.c

142

.update_mpcc = dcn20_update_mpcc,

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_init.c

131

.update_mpcc = dcn20_update_mpcc,

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_init.c

126

.update_mpcc = dcn20_update_mpcc,