drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp.c

105

struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp.c

320

struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp.c

344

struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp.c

407

struct dcn20_dpp *dpp,

drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp.c

54

struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp.c

81

struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp.h

30

container_of(dpp, struct dcn20_dpp, base)

drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp.h

775

bool dpp2_construct(struct dcn20_dpp *dpp2,

drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

1020

struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

1039

struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

1055

struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

1089

struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

1108

struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

1199

struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

138

struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

162

struct dcn20_dpp *dpp,

drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

217

struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

237

static void read_gamut_remap(struct dcn20_dpp *dpp,

drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

276

struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

298

struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

369

struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

380

struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

395

struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

414

struct dcn20_dpp *dpp,

drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

445

struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

473

struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

500

struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

527

struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

53

struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

566

struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

593

struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

619

struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

635

struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

70

struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

785

struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

93

struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

938

struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp_cm.c

974

struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.c

45

struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/dpp/dcn35/dcn35_dpp.c

74

struct dcn20_dpp *dpp = TO_DCN20_DPP(dpp_base);

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

766

struct dcn20_dpp *dpp =

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

767

kzalloc_obj(struct dcn20_dpp);

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

523

struct dcn20_dpp *dpp =

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

524

kzalloc_obj(struct dcn20_dpp);