drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.h

217

void dcn10_reset_surface_dcc_and_tiling(struct pipe_ctx *pipe_ctx,

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_init.c

43

.clear_surface_dcc_and_tiling = dcn10_reset_surface_dcc_and_tiling,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_init.c

39

.clear_surface_dcc_and_tiling = dcn10_reset_surface_dcc_and_tiling,

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_init.c

39

.clear_surface_dcc_and_tiling = dcn10_reset_surface_dcc_and_tiling,

drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_init.c

40

.clear_surface_dcc_and_tiling = dcn10_reset_surface_dcc_and_tiling,

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_init.c

40

.clear_surface_dcc_and_tiling = dcn10_reset_surface_dcc_and_tiling,

drivers/gpu/drm/amd/display/dc/hwss/dcn301/dcn301_init.c

42

.clear_surface_dcc_and_tiling = dcn10_reset_surface_dcc_and_tiling,

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_init.c

43

.clear_surface_dcc_and_tiling = dcn10_reset_surface_dcc_and_tiling,

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_init.c

45

.clear_surface_dcc_and_tiling = dcn10_reset_surface_dcc_and_tiling,

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_init.c

42

.clear_surface_dcc_and_tiling = dcn10_reset_surface_dcc_and_tiling,

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_init.c

47

.clear_surface_dcc_and_tiling = dcn10_reset_surface_dcc_and_tiling,

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_init.c

46

.clear_surface_dcc_and_tiling = dcn10_reset_surface_dcc_and_tiling,

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_init.c

22

.clear_surface_dcc_and_tiling = dcn10_reset_surface_dcc_and_tiling,