drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer_debug.h

33

void dcn10_clear_status_bits(struct dc *dc, unsigned int mask);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_hwseq.h

167

void dcn10_clear_status_bits(struct dc *dc, unsigned int mask);

drivers/gpu/drm/amd/display/dc/hwss/dcn10/dcn10_init.c

69

.clear_status_bits = dcn10_clear_status_bits,

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_init.c

73

.clear_status_bits = dcn10_clear_status_bits,

drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_init.c

71

.clear_status_bits = dcn10_clear_status_bits,

drivers/gpu/drm/amd/display/dc/hwss/dcn21/dcn21_init.c

73

.clear_status_bits = dcn10_clear_status_bits,

drivers/gpu/drm/amd/display/dc/hwss/dcn30/dcn30_init.c

74

.clear_status_bits = dcn10_clear_status_bits,

drivers/gpu/drm/amd/display/dc/hwss/dcn301/dcn301_init.c

75

.clear_status_bits = dcn10_clear_status_bits,

drivers/gpu/drm/amd/display/dc/hwss/dcn31/dcn31_init.c

77

.clear_status_bits = dcn10_clear_status_bits,

drivers/gpu/drm/amd/display/dc/hwss/dcn314/dcn314_init.c

79

.clear_status_bits = dcn10_clear_status_bits,

drivers/gpu/drm/amd/display/dc/hwss/dcn32/dcn32_init.c

75

.clear_status_bits = dcn10_clear_status_bits,

drivers/gpu/drm/amd/display/dc/hwss/dcn35/dcn35_init.c

80

.clear_status_bits = dcn10_clear_status_bits,

drivers/gpu/drm/amd/display/dc/hwss/dcn351/dcn351_init.c

79

.clear_status_bits = dcn10_clear_status_bits,

drivers/gpu/drm/amd/display/dc/hwss/dcn401/dcn401_init.c

56

.clear_status_bits = dcn10_clear_status_bits,