cx25840_read4
pll_frac = cx25840_read4(client, 0x10c) & 0x1ffffff;
val = cx25840_read4(client, MODE_CTRL);
val = cx25840_read4(client, AFE_CTRL);
(cx25840_read4(client, addr) & and_mask) |
pin_ctrl = cx25840_read4(client, 0x120);
u32 fmt = (cx25840_read4(client, 0x40c) >> 8) & 0xf;
if ((cx25840_read4(client, 0x40c) & 0x00010000) == 0)
aud_mc_stat = cx25840_read4(c, CX23885_AUD_MC_INT_MASK_REG);
vid_stat = cx25840_read4(c, CX25840_VID_INT_STAT_REG);
if (cx25840_read4(client, 0x204) & 0xffff) {
ret = cx25840_read4(client, 0x300);
} else if (cx25840_read4(client, 0x300) & 0x0fffffff) {
u32 cx25840_read4(struct i2c_client *client, u16 addr);
cntrl = cx25840_read4(c, CX25840_IR_CNTRL_REG);
txclk = cx25840_read4(c, CX25840_IR_TXCLK_REG) & TXCLK_TCD;
rxclk = cx25840_read4(c, CX25840_IR_RXCLK_REG) & RXCLK_RCD;
cduty = cx25840_read4(c, CX25840_IR_CDUTY_REG) & CDUTY_CDC;
stats = cx25840_read4(c, CX25840_IR_STATS_REG);
irqen = cx25840_read4(c, CX25840_IR_IRQEN_REG);
filtr = cx25840_read4(c, CX25840_IR_FILTR_REG) & FILTR_LPF;
cntrl = cx25840_read4(c, CX25840_IR_CNTRL_REG);
irqen = cx25840_read4(c, CX25840_IR_IRQEN_REG);
stats = cx25840_read4(c, CX25840_IR_STATS_REG);
v = cx25840_read4(c, CX25840_IR_FIFO_REG);