cx24113_readreg
r = cx24113_readreg(state, 0x10) & 0x82;
r = cx24113_readreg(state, 0x20) & 0xec;
r = cx24113_readreg(state, 0x12) & 0x03;
r = cx24113_readreg(state, 0x18) & 0x40;
r = cx24113_readreg(state, 0x14) & 0x20;
r = (cx24113_readreg(state, 0x17) & 0x0f) |
u8 ampout = cx24113_readreg(state, 0x1d) & 0xf0,
vga = cx24113_readreg(state, 0x1f) & 0x3f,
rfvga = cx24113_readreg(state, 0x20) & 0xf3;
u8 xtal = cx24113_readreg(state, 0x02);
u8 r21 = (cx24113_readreg(state, 0x21) & 0xc0) | enable;
u8 r = (cx24113_readreg(state, 0x10) & 0x7f) | ((on & 0x1) << 7);
u8 r = (cx24113_readreg(state, 0x10) & 0x02) >> 1;
r = cx24113_readreg(state, 0x10);
reg = cx24113_readreg(state, 0x1c) & 0x1f;
r = cx24113_readreg(state, 0x14);
r = cx24113_readreg(state, 0x10);
r = cx24113_readreg(state, 0x18) & 0xbf;
r = cx24113_readreg(state, 0x1c) & 0xef;
(cx24113_readreg(state, 0x02) & 0xfb) | (1 << 2));
(cx24113_readreg(state, 0x02) & 0xfb) | (0 << 2));
cx24113_readreg(state, 0x00);
rc = cx24113_readreg(state, 0x00);
state->ver = cx24113_readreg(state, 0x01);