drivers/gpu/drm/amd/display/dc/dccg/dcn20/dcn20_dccg.c

200

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/dccg/dcn20/dcn20_dccg.c

216

dccg_dcn->dccg_shift = dccg_shift;

drivers/gpu/drm/amd/display/dc/dccg/dcn20/dcn20_dccg.c

40

dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name

drivers/gpu/drm/amd/display/dc/dccg/dcn20/dcn20_dccg.h

505

const struct dccg_shift *dccg_shift;

drivers/gpu/drm/amd/display/dc/dccg/dcn20/dcn20_dccg.h

533

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/dccg/dcn201/dcn201_dccg.c

40

dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name

drivers/gpu/drm/amd/display/dc/dccg/dcn201/dcn201_dccg.c

70

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/dccg/dcn201/dcn201_dccg.c

86

dccg_dcn->dccg_shift = dccg_shift;

drivers/gpu/drm/amd/display/dc/dccg/dcn201/dcn201_dccg.h

34

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/dccg/dcn21/dcn21_dccg.c

135

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/dccg/dcn21/dcn21_dccg.c

151

dccg_dcn->dccg_shift = dccg_shift;

drivers/gpu/drm/amd/display/dc/dccg/dcn21/dcn21_dccg.c

39

dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name

drivers/gpu/drm/amd/display/dc/dccg/dcn21/dcn21_dccg.h

32

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/dccg/dcn30/dcn30_dccg.c

103

dccg_dcn->dccg_shift = dccg_shift;

drivers/gpu/drm/amd/display/dc/dccg/dcn30/dcn30_dccg.c

38

dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name

drivers/gpu/drm/amd/display/dc/dccg/dcn30/dcn30_dccg.c

62

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/dccg/dcn30/dcn30_dccg.c

78

dccg_dcn->dccg_shift = dccg_shift;

drivers/gpu/drm/amd/display/dc/dccg/dcn30/dcn30_dccg.c

87

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/dccg/dcn30/dcn30_dccg.h

57

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/dccg/dcn30/dcn30_dccg.h

63

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/dccg/dcn301/dcn301_dccg.c

38

dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name

drivers/gpu/drm/amd/display/dc/dccg/dcn301/dcn301_dccg.c

61

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/dccg/dcn301/dcn301_dccg.c

77

dccg_dcn->dccg_shift = dccg_shift;

drivers/gpu/drm/amd/display/dc/dccg/dcn301/dcn301_dccg.h

62

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c

40

dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name

drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c

863

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.c

879

dccg_dcn->dccg_shift = dccg_shift;

drivers/gpu/drm/amd/display/dc/dccg/dcn31/dcn31_dccg.h

168

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/dccg/dcn314/dcn314_dccg.c

392

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/dccg/dcn314/dcn314_dccg.c

408

dccg_dcn->dccg_shift = dccg_shift;

drivers/gpu/drm/amd/display/dc/dccg/dcn314/dcn314_dccg.c

42

dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name

drivers/gpu/drm/amd/display/dc/dccg/dcn314/dcn314_dccg.h

205

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/dccg/dcn32/dcn32_dccg.c

360

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/dccg/dcn32/dcn32_dccg.c

376

dccg_dcn->dccg_shift = dccg_shift;

drivers/gpu/drm/amd/display/dc/dccg/dcn32/dcn32_dccg.c

39

dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name

drivers/gpu/drm/amd/display/dc/dccg/dcn32/dcn32_dccg.h

122

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c

2461

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c

2481

dccg_dcn->dccg_shift = dccg_shift;

drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.c

39

dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name

drivers/gpu/drm/amd/display/dc/dccg/dcn35/dcn35_dccg.h

247

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c

49

dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name

drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c

892

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.c

908

dccg_dcn->dccg_shift = dccg_shift;

drivers/gpu/drm/amd/display/dc/dccg/dcn401/dcn401_dccg.h

240

const struct dccg_shift *dccg_shift,

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

2563

pool->base.dccg = dccg2_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask);

drivers/gpu/drm/amd/display/dc/resource/dcn20/dcn20_resource.c

675

static const struct dccg_shift dccg_shift = {

drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

1223

pool->base.dccg = dccg201_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask);

drivers/gpu/drm/amd/display/dc/resource/dcn201/dcn201_resource.c

555

static const struct dccg_shift dccg_shift = {

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

1537

pool->base.dccg = dccg21_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask);

drivers/gpu/drm/amd/display/dc/resource/dcn21/dcn21_resource.c

229

static const struct dccg_shift dccg_shift = {

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

2466

pool->base.dccg = dccg30_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask);

drivers/gpu/drm/amd/display/dc/resource/dcn30/dcn30_resource.c

619

static const struct dccg_shift dccg_shift = {

drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

1582

pool->base.dccg = dccg301_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask);

drivers/gpu/drm/amd/display/dc/resource/dcn301/dcn301_resource.c

590

static const struct dccg_shift dccg_shift = {

drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

1207

static const struct dccg_shift dccg_shift = {

drivers/gpu/drm/amd/display/dc/resource/dcn302/dcn302_resource.c

1381

pool->dccg = dccg30_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask);

drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

1151

static const struct dccg_shift dccg_shift = {

drivers/gpu/drm/amd/display/dc/resource/dcn303/dcn303_resource.c

1313

pool->dccg = dccg30_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask);

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

2077

pool->base.dccg = dccg31_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask);

drivers/gpu/drm/amd/display/dc/resource/dcn31/dcn31_resource.c

664

static const struct dccg_shift dccg_shift = {

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

2002

pool->base.dccg = dccg314_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask);

drivers/gpu/drm/amd/display/dc/resource/dcn314/dcn314_resource.c

671

static const struct dccg_shift dccg_shift = {

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

2026

pool->base.dccg = dccg31_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask);

drivers/gpu/drm/amd/display/dc/resource/dcn315/dcn315_resource.c

663

static const struct dccg_shift dccg_shift = {

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

1901

pool->base.dccg = dccg31_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask);

drivers/gpu/drm/amd/display/dc/resource/dcn316/dcn316_resource.c

658

static const struct dccg_shift dccg_shift = {

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

2387

pool->base.dccg = dccg32_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask);

drivers/gpu/drm/amd/display/dc/resource/dcn32/dcn32_resource.c

517

static const struct dccg_shift dccg_shift = {

drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

1886

pool->base.dccg = dccg32_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask);

drivers/gpu/drm/amd/display/dc/resource/dcn321/dcn321_resource.c

513

static const struct dccg_shift dccg_shift = {

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

2039

pool->base.dccg = dccg35_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask);

drivers/gpu/drm/amd/display/dc/resource/dcn35/dcn35_resource.c

527

static const struct dccg_shift dccg_shift = {

drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

2011

pool->base.dccg = dccg35_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask);

drivers/gpu/drm/amd/display/dc/resource/dcn351/dcn351_resource.c

507

static const struct dccg_shift dccg_shift = {

drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

2018

pool->base.dccg = dccg35_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask);

drivers/gpu/drm/amd/display/dc/resource/dcn36/dcn36_resource.c

514

static const struct dccg_shift dccg_shift = {

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

2087

pool->base.dccg = dccg401_create(ctx, &dccg_regs, &dccg_shift, &dccg_mask);

drivers/gpu/drm/amd/display/dc/resource/dcn401/dcn401_resource.c

493

static const struct dccg_shift dccg_shift = {