arch/mips/txx9/generic/setup.c

149

unsigned int dc_size = 1 << (12 + ((conf & CONF_DC) >> 6));

arch/mips/txx9/generic/setup.c

153

end = INDEX_BASE + dc_size / 4;

arch/parisc/include/uapi/asm/pdc.h

516

unsigned long dc_size; /* size in bytes */

arch/parisc/kernel/alternative.c

112

if (cache_info.dc_size == 0 && cache_info.ic_size == 0) {

arch/parisc/kernel/alternative.c

116

if (cache_info.dc_size == 0)

arch/parisc/kernel/alternative.c

33

((cache_info.dc_size == 0) ? ALT_COND_NO_DCACHE : 0) |

arch/parisc/kernel/cache.c

144

cache_info.dc_size/1024,

arch/parisc/kernel/cache.c

187

cache_info.dc_size,

arch/parisc/kernel/cache.c

280

WARN_ON(cache_info.dc_size && dcache_stride == 0);

arch/parisc/kernel/cache.c

581

threshold2 = cache_info.dc_size * num_online_cpus();

drivers/gpu/drm/amd/display/dc/dc.h

388

struct dc_size surface_size;

drivers/gpu/drm/amd/display/dc/dc.h

391

struct dc_size plane1_size;