drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2682

struct dc_dmub_srv *dc_dmub_srv;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2692

dc_dmub_srv = dc->ctx->dmub_srv;

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2693

if (dc_dmub_srv && dc_dmub_srv->dmub) {

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_debugfs.c

2696

&dc_dmub_srv->dmub->shared_state[DMUB_SHARED_SHARE_FEATURE__IPS_FW].data.ips_fw;

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

1029

struct dc_dmub_srv *dmcub,

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

110

struct dc_dmub_srv *dmcub,

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

247

struct dc_dmub_srv *dmcub,

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

309

struct dc_dmub_srv *dmcub,

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

462

struct dc_dmub_srv *dmcub,

drivers/gpu/drm/amd/display/dc/bios/command_table2.c

825

struct dc_dmub_srv *dmcub,

drivers/gpu/drm/amd/display/dc/core/dc.c

559

dc_stream_forward_dmub_crc_window(struct dc_dmub_srv *dmub_srv,

drivers/gpu/drm/amd/display/dc/core/dc.c

597

struct dc_dmub_srv *dmub_srv;

drivers/gpu/drm/amd/display/dc/core/dc.c

632

dc_stream_forward_dmub_multiple_crc_window(struct dc_dmub_srv *dmub_srv,

drivers/gpu/drm/amd/display/dc/core/dc.c

663

struct dc_dmub_srv *dmub_srv;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

1555

struct dc_dmub_srv *dc_dmub_srv,

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

1560

seq_state->steps[*seq_state->num_steps].params.subvp_save_surf_addr.dc_dmub_srv = dc_dmub_srv;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2017

struct dc_dmub_srv *dc_dmub_srv = params->subvp_save_surf_addr.dc_dmub_srv;

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

2021

dc_dmub_srv_subvp_save_surf_addr(dc_dmub_srv, addr, subvp_index);

drivers/gpu/drm/amd/display/dc/core/dc_hw_sequencer.c

813

block_sequence[*num_steps].params.subvp_save_surf_addr.dc_dmub_srv = dc->ctx->dmub_srv;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1000

DC_LOG_DEBUG(" inbox0_wptr : %08x", dc_dmub_srv->dmub->debug.inbox0_wptr);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1001

DC_LOG_DEBUG(" inbox0_size : %08x", dc_dmub_srv->dmub->debug.inbox0_size);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1002

DC_LOG_DEBUG(" outbox1_rptr : %08x", dc_dmub_srv->dmub->debug.outbox1_rptr);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1003

DC_LOG_DEBUG(" outbox1_wptr : %08x", dc_dmub_srv->dmub->debug.outbox1_wptr);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1004

DC_LOG_DEBUG(" outbox1_size : %08x", dc_dmub_srv->dmub->debug.outbox1_size);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1005

DC_LOG_DEBUG(" is_enabled : %d", dc_dmub_srv->dmub->debug.is_dmcub_enabled);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1006

DC_LOG_DEBUG(" is_soft_reset : %d", dc_dmub_srv->dmub->debug.is_dmcub_soft_reset);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1007

DC_LOG_DEBUG(" is_secure_reset : %d", dc_dmub_srv->dmub->debug.is_dmcub_secure_reset);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1008

DC_LOG_DEBUG(" is_traceport_en : %d", dc_dmub_srv->dmub->debug.is_traceport_en);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1009

DC_LOG_DEBUG(" is_cw0_en : %d", dc_dmub_srv->dmub->debug.is_cw0_enabled);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

101

dc_dmub_srv_handle_failure(dc_dmub_srv);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1010

DC_LOG_DEBUG(" is_cw6_en : %d", dc_dmub_srv->dmub->debug.is_cw6_enabled);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1011

DC_LOG_DEBUG(" is_pwait : %d", dc_dmub_srv->dmub->debug.is_pwait);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

107

void dc_dmub_srv_clear_inbox0_ack(struct dc_dmub_srv *dc_dmub_srv)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

109

struct dmub_srv *dmub = dc_dmub_srv->dmub;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

110

struct dc_context *dc_ctx = dc_dmub_srv->ctx;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

116

dc_dmub_srv_handle_failure(dc_dmub_srv);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1164

struct dc_dmub_srv *dc_dmub_srv = dc->ctx->dmub_srv;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1166

if (!dc_dmub_srv || !dc_dmub_srv->dmub) {

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1186

void dc_dmub_srv_subvp_save_surf_addr(const struct dc_dmub_srv *dc_dmub_srv, const struct dc_plane_address *addr, uint8_t subvp_index)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1188

dmub_srv_subvp_save_surf_addr(dc_dmub_srv->dmub, addr, subvp_index);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1194

struct dc_dmub_srv *dc_dmub_srv = dc->ctx->dmub_srv;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

120

void dc_dmub_srv_wait_for_inbox0_ack(struct dc_dmub_srv *dc_dmub_srv)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1200

if (!dc_dmub_srv->dmub->meta_info.feature_bits.bits.cursor_offload_v1_support)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1203

if (!dc_dmub_srv->dmub->cursor_offload_fb.gpu_addr || !dc_dmub_srv->dmub->cursor_offload_fb.cpu_addr)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1206

if (!dc_dmub_srv->dmub->cursor_offload_v1)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1209

if (!dc_dmub_srv->dmub->shared_state)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1218

init->init_data.state_addr.quad_part = dc_dmub_srv->dmub->cursor_offload_fb.gpu_addr;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1219

init->init_data.state_size = dc_dmub_srv->dmub->cursor_offload_fb.size;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

122

struct dmub_srv *dmub = dc_dmub_srv->dmub;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1223

dc_dmub_srv->cursor_offload_enabled = true;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

123

struct dc_context *dc_ctx = dc_dmub_srv->ctx;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1285

bool dc_dmub_srv_is_hw_pwr_up(struct dc_dmub_srv *dc_dmub_srv, bool wait)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

129

dc_dmub_srv_handle_failure(dc_dmub_srv);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1290

if (!dc_dmub_srv || !dc_dmub_srv->dmub)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1293

if (dc_dmub_srv->ctx->dc->debug.dmcub_emulation)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1296

dc_ctx = dc_dmub_srv->ctx;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1299

if (dc_dmub_srv->ctx->dc->debug.disable_timeout) {

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1301

status = dmub_srv_wait_for_hw_pwr_up(dc_dmub_srv->dmub, 500000);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1304

status = dmub_srv_wait_for_hw_pwr_up(dc_dmub_srv->dmub, 500000);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1311

return dmub_srv_is_hw_pwr_up(dc_dmub_srv->dmub);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

133

void dc_dmub_srv_send_inbox0_cmd(struct dc_dmub_srv *dc_dmub_srv,

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1333

struct dc_dmub_srv *dc_dmub_srv;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1342

dc_dmub_srv = dc->ctx->dmub_srv;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1343

ips_fw = &dc_dmub_srv->dmub->shared_state[DMUB_SHARED_SHARE_FEATURE__IPS_FW].data.ips_fw;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1359

&dc_dmub_srv->dmub->shared_state[DMUB_SHARED_SHARE_FEATURE__IPS_DRIVER].data.ips_driver;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

136

struct dmub_srv *dmub = dc_dmub_srv->dmub;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

137

struct dc_context *dc_ctx = dc_dmub_srv->ctx;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

143

dc_dmub_srv_handle_failure(dc_dmub_srv);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1433

dc_dmub_srv->driver_signals = ips_driver->signals;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1449

dc_dmub_srv->needs_idle_wake = true;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1454

struct dc_dmub_srv *dc_dmub_srv;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1463

dc_dmub_srv = dc->ctx->dmub_srv;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1467

&dc_dmub_srv->dmub->shared_state[DMUB_SHARED_SHARE_FEATURE__IPS_FW].data.ips_fw;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1469

&dc_dmub_srv->dmub->shared_state[DMUB_SHARED_SHARE_FEATURE__IPS_DRIVER].data.ips_driver;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

147

static bool dc_dmub_srv_reg_cmd_list_queue_execute(struct dc_dmub_srv *dc_dmub_srv,

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1478

dc_dmub_srv->driver_signals = ips_driver->signals;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1496

dc_dmub_srv->needs_idle_wake = false;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

156

if (!dc_dmub_srv || !dc_dmub_srv->dmub)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1589

void dc_dmub_srv_set_power_state(struct dc_dmub_srv *dc_dmub_srv, enum dc_acpi_cm_power_state power_state)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

159

dc_ctx = dc_dmub_srv->ctx;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1593

if (!dc_dmub_srv)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1596

dmub = dc_dmub_srv->dmub;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

160

dmub = dc_dmub_srv->dmub;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1604

void dc_dmub_srv_notify_fw_dc_power_state(struct dc_dmub_srv *dc_dmub_srv,

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1609

if (!dc_dmub_srv)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1627

dc_wake_and_execute_dmub_cmd(dc_dmub_srv->ctx, &cmd, DM_DMUB_WAIT_TYPE_WAIT);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1630

bool dc_dmub_srv_should_detect(struct dc_dmub_srv *dc_dmub_srv)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1635

if (!dc_dmub_srv || !dc_dmub_srv->dmub)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1638

if (dc_dmub_srv->dmub->shared_state &&

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1639

dc_dmub_srv->dmub->meta_info.feature_bits.bits.shared_state_link_detection) {

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1640

ips_fw = &dc_dmub_srv->dmub->shared_state[DMUB_SHARED_SHARE_FEATURE__IPS_FW].data.ips_fw;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1645

if (dc_dmub_srv->idle_allowed) {

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1646

dc_dmub_srv_apply_idle_power_optimizations(dc_dmub_srv->ctx->dc, false);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1650

should_detect = dmub_srv_should_detect(dc_dmub_srv->dmub);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1653

if (!should_detect && reallow_idle && dc_dmub_srv->idle_exit_counter == 0 &&

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1654

!dc_dmub_srv->ctx->dc->debug.disable_dmub_reallow_idle)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1655

dc_dmub_srv_apply_idle_power_optimizations(dc_dmub_srv->ctx->dc, true);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

166

} while (dc_dmub_srv->ctx->dc->debug.disable_timeout && status != DMUB_STATUS_OK);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1662

struct dc_dmub_srv *dc_dmub_srv = dc->ctx->dmub_srv;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1664

if (!dc_dmub_srv || !dc_dmub_srv->dmub)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1669

if (dc_dmub_srv->idle_allowed == allow_idle)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1672

DC_LOG_IPS("%s state change: old=%d new=%d", __func__, dc_dmub_srv->idle_allowed, allow_idle);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1682

dc_dmub_srv->idle_exit_counter += 1;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1694

dc_dmub_srv->idle_allowed = false;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1696

dc_dmub_srv->idle_exit_counter -= 1;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1697

if (dc_dmub_srv->idle_exit_counter < 0) {

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1699

dc_dmub_srv->idle_exit_counter = 0;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1704

dc_dmub_srv->idle_allowed = true;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1719

struct dc_dmub_srv *dc_dmub_srv = ctx->dmub_srv;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1722

if (!dc_dmub_srv || !dc_dmub_srv->dmub)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1728

if (dc_dmub_srv->idle_allowed) {

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1742

if (result && reallow_idle && dc_dmub_srv->idle_exit_counter == 0 &&

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1752

struct dc_dmub_srv *dc_dmub_srv = ctx->dmub_srv;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1759

if (!dc_dmub_srv || !dc_dmub_srv->dmub)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1762

status = dmub_srv_send_gpint_command(dc_dmub_srv->dmub, command_code, param, wait_us);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1771

dmub_srv_get_gpint_response(dc_dmub_srv->dmub, response);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1779

struct dc_dmub_srv *dc_dmub_srv = ctx->dmub_srv;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1782

if (!dc_dmub_srv || !dc_dmub_srv->dmub)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1785

if (dc_dmub_srv->idle_allowed) {

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

1792

if (result && reallow_idle && dc_dmub_srv->idle_exit_counter == 0 &&

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

181

dc_dmub_srv_handle_failure(dc_dmub_srv);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

189

static bool dc_dmub_srv_fb_cmd_list_queue_execute(struct dc_dmub_srv *dc_dmub_srv,

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

198

if (!dc_dmub_srv || !dc_dmub_srv->dmub)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

201

dc_ctx = dc_dmub_srv->ctx;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

202

dmub = dc_dmub_srv->dmub;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

2098

bool dmub_lsdma_init(struct dc_dmub_srv *dc_dmub_srv)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

2100

struct dc_context *dc_ctx = dc_dmub_srv->ctx;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

2106

if (!dc_dmub_srv->dmub->feature_caps.lsdma_support_in_dmu)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

2127

struct dc_dmub_srv *dc_dmub_srv,

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

2133

struct dc_context *dc_ctx = dc_dmub_srv->ctx;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

2160

struct dc_dmub_srv *dc_dmub_srv,

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

2164

struct dc_context *dc_ctx = dc_dmub_srv->ctx;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

2204

struct dc_dmub_srv *dc_dmub_srv,

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

2208

struct dc_context *dc_ctx = dc_dmub_srv->ctx;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

221

} while (dc_dmub_srv->ctx->dc->debug.disable_timeout && status != DMUB_STATUS_OK);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

2255

struct dc_dmub_srv *dc_dmub_srv,

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

2262

struct dc_context *dc_ctx = dc_dmub_srv->ctx;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

2290

struct dc_dmub_srv *dc_dmub_srv,

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

2296

struct dc_context *dc_ctx = dc_dmub_srv->ctx;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

230

dc_dmub_srv_handle_failure(dc_dmub_srv);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

2322

bool dmub_lsdma_send_poll_reg_write_command(struct dc_dmub_srv *dc_dmub_srv, uint32_t reg_addr, uint32_t reg_data)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

2324

struct dc_context *dc_ctx = dc_dmub_srv->ctx;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

2354

struct dc_dmub_srv *dc_dmub_srv = dc->ctx->dmub_srv;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

2357

if (!dc_dmub_srv || !dc_dmub_srv->dmub)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

2370

void dc_dmub_srv_log_preos_dmcub_info(struct dc_dmub_srv *dc_dmub_srv)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

2374

if (!dc_dmub_srv || !dc_dmub_srv->dmub)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

2377

dmub = dc_dmub_srv->dmub;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

240

dc_dmub_srv_handle_failure(dc_dmub_srv);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

248

bool dc_dmub_srv_cmd_list_queue_execute(struct dc_dmub_srv *dc_dmub_srv,

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

254

if (dc_dmub_srv && dc_dmub_srv->dmub) {

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

255

if (dc_dmub_srv->dmub->inbox_type == DMUB_CMD_INTERFACE_REG) {

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

256

res = dc_dmub_srv_reg_cmd_list_queue_execute(dc_dmub_srv, count, cmd_list);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

258

res = dc_dmub_srv_fb_cmd_list_queue_execute(dc_dmub_srv, count, cmd_list);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

262

res = dmub_srv_update_inbox_status(dc_dmub_srv->dmub) == DMUB_STATUS_OK;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

268

bool dc_dmub_srv_wait_for_idle(struct dc_dmub_srv *dc_dmub_srv,

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

275

if (!dc_dmub_srv || !dc_dmub_srv->dmub)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

278

dmub = dc_dmub_srv->dmub;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

284

} while (dc_dmub_srv->ctx->dc->debug.disable_timeout && status != DMUB_STATUS_OK);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

292

dmub->debug.timeout_info.timestamp = dm_get_timestamp(dc_dmub_srv->ctx);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

294

dc_dmub_srv_handle_failure(dc_dmub_srv);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

300

dmub_srv_cmd_get_response(dc_dmub_srv->dmub, cmd_list);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

307

bool dc_dmub_srv_cmd_run(struct dc_dmub_srv *dc_dmub_srv, union dmub_rb_cmd *cmd, enum dm_dmub_wait_type wait_type)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

309

return dc_dmub_srv_cmd_run_list(dc_dmub_srv, 1, cmd, wait_type);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

312

bool dc_dmub_srv_cmd_run_list(struct dc_dmub_srv *dc_dmub_srv, unsigned int count, union dmub_rb_cmd *cmd_list, enum dm_dmub_wait_type wait_type)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

314

if (!dc_dmub_srv_cmd_list_queue_execute(dc_dmub_srv, count, cmd_list))

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

317

return dc_dmub_srv_wait_for_idle(dc_dmub_srv, wait_type, cmd_list);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

320

bool dc_dmub_srv_optimized_init_done(struct dc_dmub_srv *dc_dmub_srv)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

327

if (!dc_dmub_srv || !dc_dmub_srv->dmub)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

330

dmub = dc_dmub_srv->dmub;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

331

dc_ctx = dc_dmub_srv->ctx;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

342

bool dc_dmub_srv_notify_stream_mask(struct dc_dmub_srv *dc_dmub_srv,

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

345

if (!dc_dmub_srv || !dc_dmub_srv->dmub)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

348

return dc_wake_and_execute_gpint(dc_dmub_srv->ctx, DMUB_GPINT__IDLE_OPT_NOTIFY_STREAM_MASK,

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

352

bool dc_dmub_srv_is_restore_required(struct dc_dmub_srv *dc_dmub_srv)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

359

if (!dc_dmub_srv || !dc_dmub_srv->dmub)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

362

dmub = dc_dmub_srv->dmub;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

363

dc_ctx = dc_dmub_srv->ctx;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

40

#define CTX dc_dmub_srv->ctx

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

46

static void dc_dmub_srv_construct(struct dc_dmub_srv *dc_srv, struct dc *dc,

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

514

void dc_dmub_srv_query_caps_cmd(struct dc_dmub_srv *dc_dmub_srv)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

518

if (dc_dmub_srv->ctx->dc->debug.dmcub_emulation)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

53

static void dc_dmub_srv_handle_failure(struct dc_dmub_srv *dc_dmub_srv)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

530

if (dc_wake_and_execute_dmub_cmd(dc_dmub_srv->ctx, &cmd, DM_DMUB_WAIT_TYPE_WAIT_WITH_REPLY) &&

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

532

memcpy(&dc_dmub_srv->dmub->feature_caps,

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

55

dc_dmub_srv_log_diagnostic_data(dc_dmub_srv);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

56

if (dc_dmub_srv->ctx->dc->debug.enable_dmu_recovery)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

57

dm_helpers_dmu_timeout(dc_dmub_srv->ctx);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

60

struct dc_dmub_srv *dc_dmub_srv_create(struct dc *dc, struct dmub_srv *dmub)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

62

struct dc_dmub_srv *dc_srv =

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

63

kzalloc_obj(struct dc_dmub_srv);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

75

void dc_dmub_srv_destroy(struct dc_dmub_srv **dmub_srv)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

83

bool dc_dmub_srv_wait_for_pending(struct dc_dmub_srv *dc_dmub_srv)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

89

if (!dc_dmub_srv || !dc_dmub_srv->dmub)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

92

dc_ctx = dc_dmub_srv->ctx;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

93

dmub = dc_dmub_srv->dmub;

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

950

bool dc_dmub_srv_get_diagnostic_data(struct dc_dmub_srv *dc_dmub_srv)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

952

if (!dc_dmub_srv || !dc_dmub_srv->dmub)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

954

return dmub_srv_get_diagnostic_data(dc_dmub_srv->dmub);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

957

void dc_dmub_srv_log_diagnostic_data(struct dc_dmub_srv *dc_dmub_srv)

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

961

if (!dc_dmub_srv || !dc_dmub_srv->dmub) {

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

968

if (!dc_dmub_srv_get_diagnostic_data(dc_dmub_srv)) {

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

97

} while (dc_dmub_srv->ctx->dc->debug.disable_timeout && status != DMUB_STATUS_OK);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

974

DC_LOG_DEBUG(" dmcub_version : %08x", dc_dmub_srv->dmub->debug.dmcub_version);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

975

DC_LOG_DEBUG(" scratch [0] : %08x", dc_dmub_srv->dmub->debug.scratch[0]);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

976

DC_LOG_DEBUG(" scratch [1] : %08x", dc_dmub_srv->dmub->debug.scratch[1]);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

977

DC_LOG_DEBUG(" scratch [2] : %08x", dc_dmub_srv->dmub->debug.scratch[2]);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

978

DC_LOG_DEBUG(" scratch [3] : %08x", dc_dmub_srv->dmub->debug.scratch[3]);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

979

DC_LOG_DEBUG(" scratch [4] : %08x", dc_dmub_srv->dmub->debug.scratch[4]);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

980

DC_LOG_DEBUG(" scratch [5] : %08x", dc_dmub_srv->dmub->debug.scratch[5]);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

981

DC_LOG_DEBUG(" scratch [6] : %08x", dc_dmub_srv->dmub->debug.scratch[6]);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

982

DC_LOG_DEBUG(" scratch [7] : %08x", dc_dmub_srv->dmub->debug.scratch[7]);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

983

DC_LOG_DEBUG(" scratch [8] : %08x", dc_dmub_srv->dmub->debug.scratch[8]);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

984

DC_LOG_DEBUG(" scratch [9] : %08x", dc_dmub_srv->dmub->debug.scratch[9]);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

985

DC_LOG_DEBUG(" scratch [10] : %08x", dc_dmub_srv->dmub->debug.scratch[10]);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

986

DC_LOG_DEBUG(" scratch [11] : %08x", dc_dmub_srv->dmub->debug.scratch[11]);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

987

DC_LOG_DEBUG(" scratch [12] : %08x", dc_dmub_srv->dmub->debug.scratch[12]);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

988

DC_LOG_DEBUG(" scratch [13] : %08x", dc_dmub_srv->dmub->debug.scratch[13]);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

989

DC_LOG_DEBUG(" scratch [14] : %08x", dc_dmub_srv->dmub->debug.scratch[14]);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

990

DC_LOG_DEBUG(" scratch [15] : %08x", dc_dmub_srv->dmub->debug.scratch[15]);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

992

DC_LOG_DEBUG(" pc[%d] : %08x", i, dc_dmub_srv->dmub->debug.pc[i]);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

993

DC_LOG_DEBUG(" unk_fault_addr : %08x", dc_dmub_srv->dmub->debug.undefined_address_fault_addr);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

994

DC_LOG_DEBUG(" inst_fault_addr : %08x", dc_dmub_srv->dmub->debug.inst_fetch_fault_addr);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

995

DC_LOG_DEBUG(" data_fault_addr : %08x", dc_dmub_srv->dmub->debug.data_write_fault_addr);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

996

DC_LOG_DEBUG(" inbox1_rptr : %08x", dc_dmub_srv->dmub->debug.inbox1_rptr);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

997

DC_LOG_DEBUG(" inbox1_wptr : %08x", dc_dmub_srv->dmub->debug.inbox1_wptr);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

998

DC_LOG_DEBUG(" inbox1_size : %08x", dc_dmub_srv->dmub->debug.inbox1_size);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c

999

DC_LOG_DEBUG(" inbox0_rptr : %08x", dc_dmub_srv->dmub->debug.inbox0_rptr);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h

101

void dc_dmub_srv_log_diagnostic_data(struct dc_dmub_srv *dc_dmub_srv);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h

107

void dc_dmub_srv_subvp_save_surf_addr(const struct dc_dmub_srv *dc_dmub_srv, const struct dc_plane_address *addr, uint8_t subvp_index);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h

109

bool dc_dmub_srv_is_hw_pwr_up(struct dc_dmub_srv *dc_dmub_srv, bool wait);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h

122

void dc_dmub_srv_set_power_state(struct dc_dmub_srv *dc_dmub_srv, enum dc_acpi_cm_power_state power_state);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h

134

void dc_dmub_srv_notify_fw_dc_power_state(struct dc_dmub_srv *dc_dmub_srv,

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h

145

bool dc_dmub_srv_should_detect(struct dc_dmub_srv *dc_dmub_srv);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h

214

bool dmub_lsdma_init(struct dc_dmub_srv *dc_dmub_srv);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h

216

struct dc_dmub_srv *dc_dmub_srv,

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h

251

struct dc_dmub_srv *dc_dmub_srv,

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h

255

struct dc_dmub_srv *dc_dmub_srv,

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h

261

struct dc_dmub_srv *dc_dmub_srv,

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h

298

struct dc_dmub_srv *dc_dmub_srv,

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h

300

bool dmub_lsdma_send_poll_reg_write_command(struct dc_dmub_srv *dc_dmub_srv, uint32_t reg_addr, uint32_t reg_data);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h

376

void dc_dmub_srv_log_preos_dmcub_info(struct dc_dmub_srv *dc_dmub_srv);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h

62

bool dc_dmub_srv_wait_for_pending(struct dc_dmub_srv *dc_dmub_srv);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h

64

bool dc_dmub_srv_optimized_init_done(struct dc_dmub_srv *dc_dmub_srv);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h

66

bool dc_dmub_srv_cmd_list_queue_execute(struct dc_dmub_srv *dc_dmub_srv,

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h

70

bool dc_dmub_srv_wait_for_idle(struct dc_dmub_srv *dc_dmub_srv,

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h

74

bool dc_dmub_srv_cmd_run(struct dc_dmub_srv *dc_dmub_srv, union dmub_rb_cmd *cmd, enum dm_dmub_wait_type wait_type);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h

76

bool dc_dmub_srv_cmd_run_list(struct dc_dmub_srv *dc_dmub_srv, unsigned int count, union dmub_rb_cmd *cmd_list, enum dm_dmub_wait_type wait_type);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h

78

bool dc_dmub_srv_notify_stream_mask(struct dc_dmub_srv *dc_dmub_srv,

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h

81

bool dc_dmub_srv_is_restore_required(struct dc_dmub_srv *dc_dmub_srv);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h

92

void dc_dmub_srv_query_caps_cmd(struct dc_dmub_srv *dc_dmub_srv);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h

94

void dc_dmub_srv_clear_inbox0_ack(struct dc_dmub_srv *dmub_srv);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h

95

void dc_dmub_srv_wait_for_inbox0_ack(struct dc_dmub_srv *dmub_srv);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h

96

void dc_dmub_srv_send_inbox0_cmd(struct dc_dmub_srv *dmub_srv, union dmub_inbox0_data_register data);

drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h

98

bool dc_dmub_srv_get_diagnostic_data(struct dc_dmub_srv *dc_dmub_srv);

drivers/gpu/drm/amd/display/dc/dc_types.h

51

struct dc_dmub_srv;

drivers/gpu/drm/amd/display/dc/dc_types.h

825

struct dc_dmub_srv *dmub_srv;

drivers/gpu/drm/amd/display/dc/dce/dmub_hw_lock_mgr.c

31

void dmub_hw_lock_mgr_cmd(struct dc_dmub_srv *dmub_srv,

drivers/gpu/drm/amd/display/dc/dce/dmub_hw_lock_mgr.c

53

void dmub_hw_lock_mgr_inbox0_cmd(struct dc_dmub_srv *dmub_srv,

drivers/gpu/drm/amd/display/dc/dce/dmub_hw_lock_mgr.h

32

void dmub_hw_lock_mgr_cmd(struct dc_dmub_srv *dmub_srv,

drivers/gpu/drm/amd/display/dc/dce/dmub_hw_lock_mgr.h

37

void dmub_hw_lock_mgr_inbox0_cmd(struct dc_dmub_srv *dmub_srv,

drivers/gpu/drm/amd/display/dc/dce/dmub_outbox.c

39

void dmub_enable_outbox_notification(struct dc_dmub_srv *dmub_srv)

drivers/gpu/drm/amd/display/dc/dce/dmub_outbox.h

29

struct dc_dmub_srv;

drivers/gpu/drm/amd/display/dc/dce/dmub_outbox.h

31

void dmub_enable_outbox_notification(struct dc_dmub_srv *dmub_srv);

drivers/gpu/drm/amd/display/dc/dcn31/dcn31_panel_cntl.c

110

if (!dc_wake_and_execute_dmub_cmd(dc_dmub_srv->ctx, &cmd, DM_DMUB_WAIT_TYPE_WAIT_WITH_REPLY))

drivers/gpu/drm/amd/display/dc/dcn31/dcn31_panel_cntl.c

44

struct dc_dmub_srv *dc_dmub_srv = panel_cntl->ctx->dmub_srv;

drivers/gpu/drm/amd/display/dc/dcn31/dcn31_panel_cntl.c

46

if (!dc_dmub_srv)

drivers/gpu/drm/amd/display/dc/dcn31/dcn31_panel_cntl.c

55

return dc_wake_and_execute_dmub_cmd(dc_dmub_srv->ctx, cmd, DM_DMUB_WAIT_TYPE_WAIT_WITH_REPLY);

drivers/gpu/drm/amd/display/dc/dcn31/dcn31_panel_cntl.c

71

struct dc_dmub_srv *dc_dmub_srv = panel_cntl->ctx->dmub_srv;

drivers/gpu/drm/amd/display/dc/dcn31/dcn31_panel_cntl.c

75

if (!dc_dmub_srv)

drivers/gpu/drm/amd/display/dc/dcn31/dcn31_panel_cntl.c

89

if (!dc_wake_and_execute_dmub_cmd(dc_dmub_srv->ctx, &cmd, DM_DMUB_WAIT_TYPE_WAIT_WITH_REPLY))

drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c

105

struct dc_dmub_srv *dc_dmub_srv = enc->ctx->dmub_srv;

drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c

111

return dc_dmub_srv &&

drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c

112

!(dc_dmub_srv->dmub->fw_version >= DMUB_FW_VERSION(4, 0, 0) &&

drivers/gpu/drm/amd/display/dc/dio/dcn31/dcn31_dio_link_encoder.c

113

dc_dmub_srv->dmub->fw_version <= DMUB_FW_VERSION(4, 0, 10));

drivers/gpu/drm/amd/display/dc/dm_services.h

127

struct dc_dmub_srv *dc_dmub_srv_create(struct dc *dc, struct dmub_srv *dmub);

drivers/gpu/drm/amd/display/dc/dm_services.h

128

void dc_dmub_srv_destroy(struct dc_dmub_srv **dmub_srv);

drivers/gpu/drm/amd/display/dc/dm_services.h

42

struct dc_dmub_srv;

drivers/gpu/drm/amd/display/dc/hwss/dcn20/dcn20_hwseq.c

1850

params.subvp_save_surf_addr.dc_dmub_srv = dc->ctx->dmub_srv;

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

145

struct dc_dmub_srv *dc_dmub_srv;

drivers/gpu/drm/amd/display/dc/hwss/hw_sequencer.h

1647

struct dc_dmub_srv *dc_dmub_srv, struct dc_plane_address *addr, uint8_t subvp_index);

drivers/gpu/drm/amd/display/dc/link/protocols/link_dp_dpia.c

117

struct dc_dmub_srv *dmub_srv = link->ctx->dmub_srv;