csio_set_reg_field
csio_set_reg_field(hw, CIM_BOOT_CFG_A, UPCRST_F, UPCRST_F);
csio_set_reg_field(hw, PCIE_FW_A, PCIE_FW_HALT_F,
csio_set_reg_field(hw, PCIE_FW_A, PCIE_FW_HALT_F, 0);
csio_set_reg_field(hw, CIM_BOOT_CFG_A, UPCRST_F, 0);
csio_set_reg_field(hw, CIM_BOOT_CFG_A, UPCRST_F, 0);
csio_set_reg_field(hw, MYPF_REG(PCIE_PF_CFG_A),
csio_set_reg_field(hw, MYPF_REG(PCIE_PF_CFG_A),
csio_set_reg_field(hw, PL_INT_MAP0_A, 0, 1 << pf);
csio_set_reg_field(hw, PL_INT_MAP0_A, 1 << pf, 0);
csio_set_reg_field(hw, SGE_CONTROL_A, GLOBALENABLE_F, 0);
void csio_set_reg_field(struct csio_hw *, uint32_t, uint32_t, uint32_t);
csio_set_reg_field(hw, SGE_CONTROL_A,
csio_set_reg_field(hw, SGE_CONTROL2_A,
csio_set_reg_field(hw, SGE_CONTROL_A,
csio_set_reg_field(hw, SGE_CONTROL_A, RXPKTCPLMODE_F, RXPKTCPLMODE_F);
csio_set_reg_field(hw, SGE_DBFIFO_STATUS_A,
csio_set_reg_field(hw, SGE_DBFIFO_STATUS2_A,
csio_set_reg_field(hw, SGE_DOORBELL_CONTROL_A, ENABLE_DROP_F,