da9150
da9150_reg_write(gpadc->da9150, DA9150_GPADC_MAN,
da9150_bulk_read(gpadc->da9150, DA9150_GPADC_RES_A, 2, result_regs);
struct da9150 *da9150 = dev_get_drvdata(dev->parent);
gpadc->da9150 = da9150;
struct da9150 *da9150;
void da9150_read_qif(struct da9150 *da9150, u8 addr, int count, u8 *buf)
ret = da9150_i2c_read_device(da9150->core_qif, addr, count, buf);
dev_err(da9150->dev, "Failed to read from QIF 0x%x: %d\n",
void da9150_write_qif(struct da9150 *da9150, u8 addr, int count, const u8 *buf)
ret = da9150_i2c_write_device(da9150->core_qif, addr, count, buf);
dev_err(da9150->dev, "Failed to write to QIF 0x%x: %d\n",
u8 da9150_reg_read(struct da9150 *da9150, u16 reg)
ret = regmap_read(da9150->regmap, reg, &val);
dev_err(da9150->dev, "Failed to read from reg 0x%x: %d\n",
void da9150_reg_write(struct da9150 *da9150, u16 reg, u8 val)
ret = regmap_write(da9150->regmap, reg, val);
dev_err(da9150->dev, "Failed to write to reg 0x%x: %d\n",
void da9150_set_bits(struct da9150 *da9150, u16 reg, u8 mask, u8 val)
ret = regmap_update_bits(da9150->regmap, reg, mask, val);
dev_err(da9150->dev, "Failed to set bits in reg 0x%x: %d\n",
void da9150_bulk_read(struct da9150 *da9150, u16 reg, int count, u8 *buf)
ret = regmap_bulk_read(da9150->regmap, reg, buf, count);
dev_err(da9150->dev, "Failed to bulk read from reg 0x%x: %d\n",
void da9150_bulk_write(struct da9150 *da9150, u16 reg, int count, const u8 *buf)
ret = regmap_raw_write(da9150->regmap, reg, buf, count);
dev_err(da9150->dev, "Failed to bulk write to reg 0x%x %d\n",
struct da9150 *da9150;
da9150 = devm_kzalloc(&client->dev, sizeof(*da9150), GFP_KERNEL);
if (!da9150)
da9150->dev = &client->dev;
da9150->irq = client->irq;
i2c_set_clientdata(client, da9150);
da9150->regmap = devm_regmap_init_i2c(client, &da9150_regmap_config);
if (IS_ERR(da9150->regmap)) {
ret = PTR_ERR(da9150->regmap);
dev_err(da9150->dev, "Failed to allocate register map: %d\n",
qif_addr = da9150_reg_read(da9150, DA9150_CORE2WIRE_CTRL_A);
da9150->core_qif = i2c_new_dummy_device(client->adapter, qif_addr);
if (IS_ERR(da9150->core_qif)) {
dev_err(da9150->dev, "Failed to attach QIF client\n");
return PTR_ERR(da9150->core_qif);
i2c_set_clientdata(da9150->core_qif, da9150);
da9150->irq_base = pdata->irq_base;
da9150->irq_base = -1;
ret = regmap_add_irq_chip(da9150->regmap, da9150->irq,
da9150->irq_base, &da9150_regmap_irq_chip,
&da9150->regmap_irq_data);
dev_err(da9150->dev, "Failed to add regmap irq chip: %d\n",
da9150->irq_base = regmap_irq_chip_get_base(da9150->regmap_irq_data);
enable_irq_wake(da9150->irq);
ret = mfd_add_devices(da9150->dev, -1, da9150_devs,
da9150->irq_base, NULL);
dev_err(da9150->dev, "Failed to add child devices: %d\n", ret);
regmap_del_irq_chip(da9150->irq, da9150->regmap_irq_data);
i2c_unregister_device(da9150->core_qif);
struct da9150 *da9150 = i2c_get_clientdata(client);
regmap_del_irq_chip(da9150->irq, da9150->regmap_irq_data);
mfd_remove_devices(da9150->dev);
i2c_unregister_device(da9150->core_qif);
struct da9150 *da9150 = i2c_get_clientdata(client);
da9150_set_bits(da9150, DA9150_CONFIG_D,
da9150_set_bits(da9150, DA9150_CONTROL_C,
reg = da9150_reg_read(charger->da9150, DA9150_STATUS_H);
reg = da9150_reg_read(charger->da9150, DA9150_STATUS_J);
reg = da9150_reg_read(charger->da9150, DA9150_STATUS_J);
reg = da9150_reg_read(charger->da9150, DA9150_STATUS_J);
reg = da9150_reg_read(charger->da9150, DA9150_STATUS_J);
struct da9150 *da9150;
reg = da9150_reg_read(charger->da9150, DA9150_PPR_CHGCTRL_C);
reg = da9150_reg_read(charger->da9150, DA9150_PPR_CHGCTRL_D);
reg = da9150_reg_read(charger->da9150, DA9150_PPR_CHGCTRL_B);
reg = da9150_reg_read(charger->da9150, DA9150_STATUS_H);
da9150_set_bits(charger->da9150, DA9150_PPR_BKCTRL_A,
da9150_set_bits(charger->da9150, DA9150_PPR_BKCTRL_A,
struct da9150 *da9150 = dev_get_drvdata(dev->parent);
charger->da9150 = da9150;
reg = da9150_reg_read(da9150, DA9150_STATUS_H);
da9150_write_qif(fg->da9150, write_addr, size, buf);
struct da9150 *da9150 = dev_get_drvdata(dev->parent);
fg->da9150 = da9150;
da9150_set_bits(da9150, DA9150_CORE2WIRE_CTRL_A, DA9150_FG_QIF_EN_MASK,
struct da9150 *da9150;
da9150_read_qif(fg->da9150, read_addr, size, buf);
void da9150_read_qif(struct da9150 *da9150, u8 addr, int count, u8 *buf);
void da9150_write_qif(struct da9150 *da9150, u8 addr, int count, const u8 *buf);
u8 da9150_reg_read(struct da9150 *da9150, u16 reg);
void da9150_reg_write(struct da9150 *da9150, u16 reg, u8 val);
void da9150_set_bits(struct da9150 *da9150, u16 reg, u8 mask, u8 val);
void da9150_bulk_read(struct da9150 *da9150, u16 reg, int count, u8 *buf);
void da9150_bulk_write(struct da9150 *da9150, u16 reg, int count, const u8 *buf);