cx24123_readreg
state->demod_rev = cx24123_readreg(state, 0x00);
u8 nom_reg = cx24123_readreg(state, 0x0e);
u8 auto_reg = cx24123_readreg(state, 0x10);
val = cx24123_readreg(state, 0x1b) >> 7;
u8 nom_reg = cx24123_readreg(state, 0x0e) & ~0x07;
cx24123_readreg(state, 0x43) | 0x01);
cx24123_readreg(state, 0x43) & ~0x01);
ret = cx24123_readreg(state, 0x1b);
tmp = cx24123_readreg(state, 0x0c) & ~0xe0;
while ((cx24123_readreg(state, 0x20) & 0x40) == 0) {
while ((cx24123_readreg(state, 0x20) & 0x40) == 0) {
while ((cx24123_readreg(state, 0x20) & 0x80)) {
cx24123_writereg(state, 0x20, cx24123_readreg(state, 0x20) | 2);
cx24123_writereg(state, 0x20, cx24123_readreg(state, 0x20) & 0xfd);
val = cx24123_readreg(state, 0x28) & ~0x3;
u8 r = cx24123_readreg(state, 0x23) & 0x1e;
cx24123_readreg(state, 0x32) | 0x02);
val = cx24123_readreg(state, 0x29) & ~0x40;
while (!(cx24123_readreg(state, 0x29) & 0x40)) {
tone = cx24123_readreg(state, 0x29);
cx24123_writereg(state, 0x2a, cx24123_readreg(state, 0x2a) & 0xfb);
val = cx24123_readreg(state, 0x29);
tone = cx24123_readreg(state, 0x29);
cx24123_writereg(state, 0x2a, cx24123_readreg(state, 0x2a) | 0x4);
val = cx24123_readreg(state, 0x29);
cx24123_writereg(state, 0x2a, cx24123_readreg(state, 0x2a) & 0xfb);
int sync = cx24123_readreg(state, 0x14);
int lock = cx24123_readreg(state, 0x20);
*ber = ((cx24123_readreg(state, 0x1c) & 0x3f) << 16) |
(cx24123_readreg(state, 0x1d) << 8 |
cx24123_readreg(state, 0x1e));
*signal_strength = cx24123_readreg(state, 0x3b) << 8;
*snr = 65535 - (((u16)cx24123_readreg(state, 0x18) << 8) |
(u16)cx24123_readreg(state, 0x19));
cx24123_writereg(state, 0x03, (cx24123_readreg(state, 0x03) | 0x07));
val = cx24123_readreg(state, 0x29) & ~0x40;