cx24120_readreg
ret = cx24120_readreg(state, CX24120_REG_RATEDIV);
reg = cx24120_readreg(state, 0xfb) & 0xfe;
reg = cx24120_readreg(state, 0xfc) & 0xfe;
reg = cx24120_readreg(state, 0xea) & 0xfe;
reg = cx24120_readreg(state, 0xfb) & 0xfe;
reg = cx24120_readreg(state, 0xe1);
reg = cx24120_readreg(state, 0xba);
vers[i] = cx24120_readreg(state, CX24120_REG_MAILBOX);
status = cx24120_readreg(state, CX24120_REG_STATUS);
freq1 = cx24120_readreg(state, CX24120_REG_FREQ1);
freq2 = cx24120_readreg(state, CX24120_REG_FREQ2);
freq3 = cx24120_readreg(state, CX24120_REG_FREQ3);
demod_rev = cx24120_readreg(state, CX24120_REG_REVISION);
err = cx24120_readreg(state, 0xfd);
ret = cx24120_readreg(state, 0xdf) & 0xfe;
while (cx24120_readreg(state, CX24120_REG_CMD_END)) {
cmd->arg[i] = cx24120_readreg(state, (cmd->len + i + 1));
if (!(cx24120_readreg(state, 0x93) & 0x01)) {
sig = cx24120_readreg(state, CX24120_REG_SIGSTR_H) >> 6;
sig |= cx24120_readreg(state, CX24120_REG_SIGSTR_L);
cnr = cx24120_readreg(state, CX24120_REG_QUALITY_H) << 8;
cnr |= cx24120_readreg(state, CX24120_REG_QUALITY_L);
ber = cx24120_readreg(state, CX24120_REG_BER_HH) << 24;
ber |= cx24120_readreg(state, CX24120_REG_BER_HL) << 16;
ber |= cx24120_readreg(state, CX24120_REG_BER_LH) << 8;
ber |= cx24120_readreg(state, CX24120_REG_BER_LL);
ucb = cx24120_readreg(state, CX24120_REG_UCB_H) << 8;
ucb |= cx24120_readreg(state, CX24120_REG_UCB_L);
lock = cx24120_readreg(state, CX24120_REG_STATUS);
ret = cx24120_readreg(state, CX24120_REG_FECMODE);