arch/mips/cavium-octeon/executive/cvmx-helper-board.c

188

cvmx_sysinfo_get()->board_type);

arch/mips/cavium-octeon/executive/cvmx-helper-board.c

300

switch (cvmx_sysinfo_get()->board_type) {

arch/mips/cavium-octeon/executive/cvmx-helper-board.c

331

switch (cvmx_sysinfo_get()->board_type) {

arch/mips/cavium-octeon/executive/cvmx-helper-board.c

65

switch (cvmx_sysinfo_get()->board_type) {

arch/mips/cavium-octeon/executive/cvmx-helper-jtag.c

50

uint32_t divisor = cvmx_sysinfo_get()->cpu_clock_hz / (25 * 1000000);

arch/mips/cavium-octeon/executive/cvmx-helper-rgmii.c

163

struct cvmx_sysinfo *sys_info_ptr = cvmx_sysinfo_get();

arch/mips/cavium-octeon/executive/cvmx-helper-rgmii.c

309

if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_SIM)

arch/mips/cavium-octeon/executive/cvmx-helper-sgmii.c

151

if (cvmx_sysinfo_get()->board_type != CVMX_BOARD_TYPE_SIM) {

arch/mips/cavium-octeon/executive/cvmx-helper-sgmii.c

181

if ((cvmx_sysinfo_get()->board_type != CVMX_BOARD_TYPE_SIM) &&

arch/mips/cavium-octeon/executive/cvmx-helper-sgmii.c

321

if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_SIM)

arch/mips/cavium-octeon/executive/cvmx-helper-sgmii.c

407

if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_SIM) {

arch/mips/cavium-octeon/executive/cvmx-helper-sgmii.c

54

const uint64_t clock_mhz = cvmx_sysinfo_get()->cpu_clock_hz / 1000000;

arch/mips/cavium-octeon/executive/cvmx-helper-spi.c

121

if (cvmx_sysinfo_get()->board_type != CVMX_BOARD_TYPE_SIM) {

arch/mips/cavium-octeon/executive/cvmx-helper-spi.c

150

if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_SIM) {

arch/mips/cavium-octeon/executive/cvmx-helper-spi.c

54

if ((cvmx_sysinfo_get()->board_type != CVMX_BOARD_TYPE_SIM) &&

arch/mips/cavium-octeon/executive/cvmx-helper-spi.c

75

if ((cvmx_sysinfo_get()->board_type != CVMX_BOARD_TYPE_SIM) &&

arch/mips/cavium-octeon/executive/cvmx-helper.c

998

&& (cvmx_sysinfo_get()->board_type != CVMX_BOARD_TYPE_SIM))

arch/mips/cavium-octeon/executive/cvmx-pko.c

581

cvmx_sysinfo_get()->cpu_clock_hz / packets_s / 16;

arch/mips/cavium-octeon/executive/cvmx-pko.c

610

uint64_t clock_rate = cvmx_sysinfo_get()->cpu_clock_hz;

arch/mips/cavium-octeon/executive/cvmx-spi.c

204

uint64_t MS = cvmx_sysinfo_get()->cpu_clock_hz / 1000;

arch/mips/cavium-octeon/executive/cvmx-spi.c

435

uint64_t MS = cvmx_sysinfo_get()->cpu_clock_hz / 1000;

arch/mips/cavium-octeon/executive/cvmx-spi.c

512

uint64_t MS = cvmx_sysinfo_get()->cpu_clock_hz / 1000;

arch/mips/cavium-octeon/executive/cvmx-spi.c

579

uint64_t MS = cvmx_sysinfo_get()->cpu_clock_hz / 1000;

arch/mips/cavium-octeon/executive/cvmx-sysinfo.c

52

EXPORT_SYMBOL(cvmx_sysinfo_get);

arch/mips/cavium-octeon/octeon-platform.c

468

switch (cvmx_sysinfo_get()->board_type) {

arch/mips/cavium-octeon/octeon-platform.c

620

switch (cvmx_sysinfo_get()->board_type) {

arch/mips/cavium-octeon/setup.c

334

struct cvmx_sysinfo *sysinfo = cvmx_sysinfo_get();

arch/mips/cavium-octeon/setup.c

676

sysinfo = cvmx_sysinfo_get();

arch/mips/cavium-octeon/smp.c

145

struct cvmx_sysinfo *sysinfo = cvmx_sysinfo_get();

arch/mips/include/asm/octeon/cvmx-sysinfo.h

123

extern struct cvmx_sysinfo *cvmx_sysinfo_get(void);

arch/mips/include/asm/octeon/cvmx.h

462

cvmx_sysinfo_get()->cpu_clock_hz / 1000000; \

arch/mips/pci/pcie-octeon.c

1071

if ((cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_EBH5200) &&

arch/mips/pci/pcie-octeon.c

754

if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_EBH5200) {