arch/mips/cavium-octeon/executive/cvmx-l2c.c

370

l2cdbg.s.ppnum = cvmx_get_core_num();

arch/mips/cavium-octeon/executive/cvmx-l2c.c

595

uint64_t core = cvmx_get_core_num();

arch/mips/cavium-octeon/executive/cvmx-l2c.c

897

l2cdbg.s.ppnum = cvmx_get_core_num();

arch/mips/cavium-octeon/octeon-irq.c

1301

const unsigned long core_id = cvmx_get_core_num();

arch/mips/cavium-octeon/octeon-irq.c

1336

int coreid = cvmx_get_core_num();

arch/mips/cavium-octeon/octeon-irq.c

1387

int coreid = cvmx_get_core_num();

arch/mips/cavium-octeon/octeon-irq.c

1409

int coreid = cvmx_get_core_num();

arch/mips/cavium-octeon/octeon-irq.c

148

return cvmx_get_core_num();

arch/mips/cavium-octeon/octeon-irq.c

1695

int coreid = cvmx_get_core_num();

arch/mips/cavium-octeon/octeon-irq.c

1711

int coreid = cvmx_get_core_num();

arch/mips/cavium-octeon/octeon-irq.c

1727

int coreid = cvmx_get_core_num();

arch/mips/cavium-octeon/octeon-irq.c

1786

int coreid = cvmx_get_core_num();

arch/mips/cavium-octeon/octeon-irq.c

1797

int coreid = cvmx_get_core_num();

arch/mips/cavium-octeon/octeon-irq.c

1999

const unsigned long core_id = cvmx_get_core_num();

arch/mips/cavium-octeon/octeon-irq.c

2037

const unsigned long core_id = cvmx_get_core_num();

arch/mips/cavium-octeon/octeon-irq.c

355

cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num() * 2), *pen);

arch/mips/cavium-octeon/octeon-irq.c

364

cvmx_write_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num() * 2 + 1), *pen);

arch/mips/cavium-octeon/octeon-irq.c

387

cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num() * 2), *pen);

arch/mips/cavium-octeon/octeon-irq.c

396

cvmx_write_csr(CVMX_CIU_INTX_EN1(cvmx_get_core_num() * 2 + 1), *pen);

arch/mips/cavium-octeon/octeon-irq.c

569

int index = cvmx_get_core_num() * 2;

arch/mips/cavium-octeon/octeon-irq.c

573

int index = cvmx_get_core_num() * 2 + 1;

arch/mips/cavium-octeon/octeon-irq.c

588

int index = cvmx_get_core_num() * 2;

arch/mips/cavium-octeon/octeon-irq.c

592

int index = cvmx_get_core_num() * 2 + 1;

arch/mips/cavium-octeon/octeon-irq.c

610

int index = cvmx_get_core_num() * 2;

arch/mips/cavium-octeon/setup.c

213

cvmx_write_csr(CVMX_CIU_WDOGX(cvmx_get_core_num()), 0);

arch/mips/cavium-octeon/setup.c

399

const int coreid = cvmx_get_core_num();

arch/mips/cavium-octeon/setup.c

438

cvmx_write_csr(CVMX_CIU_WDOGX(cvmx_get_core_num()), 0);

arch/mips/cavium-octeon/setup.c

463

cvmx_write_csr(CVMX_CIU_WDOGX(cvmx_get_core_num()), 0);

arch/mips/cavium-octeon/smp.c

142

const int coreid = cvmx_get_core_num();

arch/mips/cavium-octeon/smp.c

262

cvmx_write_csr(CVMX_CIU_MBOX_CLRX(cvmx_get_core_num()), 0xffff);

arch/mips/cavium-octeon/smp.c

345

int cpu = cpu_number_map(cvmx_get_core_num());

arch/mips/cavium-octeon/smp.c

56

u64 mbox_clrx = CVMX_CIU_MBOX_CLRX(cvmx_get_core_num());

arch/mips/include/asm/octeon/cvmx-pow.h

1269

load_addr.sstatus.coreid = cvmx_get_core_num();

arch/mips/include/asm/octeon/cvmx-pow.h

1295

load_addr.sstatus.coreid = cvmx_get_core_num();

arch/mips/include/asm/octeon/cvmx.h

351

unsigned int core_num = cvmx_get_core_num();

arch/mips/include/asm/octeon/cvmx.h

358

return cvmx_get_core_num() & ((1 << CVMX_NODE_NO_SHIFT) - 1);

arch/mips/mm/c-octeon.c

314

unsigned long coreid = cvmx_get_core_num();

drivers/edac/octeon_edac-pc.c

44

unsigned int core = cvmx_get_core_num();

drivers/staging/octeon/ethernet-rx.c

184

const int coreid = cvmx_get_core_num();

drivers/watchdog/octeon-wdt-main.c

118

return cvmx_get_core_num();

drivers/watchdog/octeon-wdt-main.c

214

unsigned int coreid = cvmx_get_core_num();