arch/mips/cavium-octeon/executive/cvmx-helper-rgmii.c

179

asx_tx.s.prt_en = cvmx_build_mask(num_ports);

arch/mips/cavium-octeon/executive/cvmx-helper-rgmii.c

183

asx_rx.s.prt_en = cvmx_build_mask(num_ports);

arch/mips/include/asm/octeon/cvmx-pow.h

2152

return ((sw_bits & cvmx_build_mask(CVMX_TAG_SW_BITS)) <<

arch/mips/include/asm/octeon/cvmx-pow.h

2154

(hw_bits & cvmx_build_mask(32 - CVMX_TAG_SW_BITS));

arch/mips/include/asm/octeon/cvmx-pow.h

2168

cvmx_build_mask(CVMX_TAG_SW_BITS);

arch/mips/include/asm/octeon/cvmx-pow.h

2182

return tag & cvmx_build_mask(32 - CVMX_TAG_SW_BITS);

arch/mips/include/asm/octeon/cvmx.h

152

return (value & cvmx_build_mask(high_bit - low_bit + 1)) << low_bit;

arch/mips/include/asm/octeon/cvmx.h

175

return CAST64(ptr) & cvmx_build_mask(30);

arch/mips/include/asm/octeon/cvmx.h

177

return CAST64(ptr) & cvmx_build_mask(40);