cpucp_info
if (!prop->cpucp_info.eq_health_check_supported)
pll_byte = prop->cpucp_info.pll_map[fw_pll_idx >> 3];
cpucp_info_cpu_addr = hl_cpu_accessible_dma_pool_alloc(hdev, sizeof(struct cpucp_info),
memset(cpucp_info_cpu_addr, 0, sizeof(struct cpucp_info));
pkt.data_max_size = cpu_to_le32(sizeof(struct cpucp_info));
memcpy(&prop->cpucp_info, cpucp_info_cpu_addr,
sizeof(prop->cpucp_info));
rc = hl_build_hwmon_channel_info(hdev, prop->cpucp_info.sensors);
kernel_ver = extract_fw_ver_from_str(prop->cpucp_info.kernel_version);
hl_cpu_accessible_dma_pool_free(hdev, sizeof(struct cpucp_info), cpucp_info_cpu_addr);
struct cpucp_info cpucp_info;
static_assert(sizeof(struct cpucp_info) <= SEC_DEV_INFO_BUF_SZ);
info->dev_info_len = sizeof(struct cpucp_info);
memcpy(hw_ip.cpucp_version, prop->cpucp_info.cpucp_version,
memcpy(hw_ip.card_name, prop->cpucp_info.card_name,
hw_ip.cpld_version = le32_to_cpu(prop->cpucp_info.cpld_version);
hw_ip.module_id = le32_to_cpu(prop->cpucp_info.card_location);
prop->cpucp_info.card_name, hdev,
le32_to_cpu(cpucp_info->infineon_version),
else if (cpucp_info->infineon_second_stage_version)
else if (cpucp_info->infineon_version)
return sprintf(buf, "%#04x\n", le32_to_cpu(cpucp_info->infineon_version));
return sprintf(buf, "%s", hdev->asic_prop.cpucp_info.kernel_version);
return sprintf(buf, "%s\n", hdev->asic_prop.cpucp_info.cpucp_version);
le32_to_cpu(hdev->asic_prop.cpucp_info.cpld_timestamp),
le32_to_cpu(hdev->asic_prop.cpucp_info.cpld_version));
return sprintf(buf, "%s", hdev->asic_prop.cpucp_info.kernel_version);
return sprintf(buf, "%s\n", hdev->asic_prop.cpucp_info.cpucp_version);
return sprintf(buf, "%s\n", hdev->asic_prop.cpucp_info.fuse_version);
return sprintf(buf, "%s", hdev->asic_prop.cpucp_info.thermal_version);
return sprintf(buf, "%s", hdev->asic_prop.cpucp_info.fw_os_version);
return sprintf(buf, "%u\n", le32_to_cpu(hdev->asic_prop.cpucp_info.card_location));
struct cpucp_info *cpucp_info;
cpucp_info = &hdev->asic_prop.cpucp_info;
infineon_second_stage_version = le32_to_cpu(cpucp_info->infineon_second_stage_version);
if (cpucp_info->infineon_version && cpucp_info->infineon_second_stage_version)
strscpy_pad(prop->cpucp_info.card_name, GAUDI_DEFAULT_CARD_NAME,
if (!strlen(prop->cpucp_info.card_name))
strscpy_pad(prop->cpucp_info.card_name, GAUDI_DEFAULT_CARD_NAME,
hdev->card_type = le32_to_cpu(hdev->asic_prop.cpucp_info.card_type);
struct cpucp_info *cpucp_info;
cpucp_info = &hdev->asic_prop.cpucp_info;
return sprintf(buf, "%#04x\n", le32_to_cpu(cpucp_info->infineon_version));
strscpy_pad(prop->cpucp_info.card_name, GAUDI2_DEFAULT_CARD_NAME, CARD_NAME_MAX_LEN);
rc = gaudi2_set_cluster_binning_masks_common(hdev, prop->cpucp_info.xbar_binning_mask);
dram_size = le64_to_cpu(prop->cpucp_info.dram_size);
if (!strlen(prop->cpucp_info.card_name))
strscpy_pad(prop->cpucp_info.card_name, GAUDI2_DEFAULT_CARD_NAME,
hdev->dram_binning = prop->cpucp_info.dram_binning_mask;
hdev->edma_binning = prop->cpucp_info.edma_binning_mask;
hdev->tpc_binning = le64_to_cpu(prop->cpucp_info.tpc_binning_mask);
hdev->decoder_binning = lower_32_bits(le64_to_cpu(prop->cpucp_info.decoder_binning_mask));
strscpy_pad(prop->cpucp_info.card_name, GOYA_DEFAULT_CARD_NAME,
dram_size = le64_to_cpu(prop->cpucp_info.dram_size);
if (!strlen(prop->cpucp_info.card_name))
strscpy_pad(prop->cpucp_info.card_name, GOYA_DEFAULT_CARD_NAME,
struct cpucp_info *cpucp_info;
cpucp_info = &hdev->asic_prop.cpucp_info;
return sprintf(buf, "%#04x\n", le32_to_cpu(cpucp_info->infineon_version));
struct cpucp_info info; /* assumed to be 64bit aligned */