cpu_priv
priv->cpu_priv.sysclk_freq[TX] = clk_get_rate(esai_clk);
priv->cpu_priv.sysclk_freq[RX] = clk_get_rate(esai_clk);
priv->cpu_priv.sysclk_id[1] = ESAI_HCKT_EXTAL;
priv->cpu_priv.sysclk_id[0] = ESAI_HCKR_EXTAL;
priv->cpu_priv.sysclk_id[1] = FSL_SAI_CLK_MAST1;
priv->cpu_priv.sysclk_id[0] = FSL_SAI_CLK_MAST1;
struct cpu_priv cpu_priv;
struct cpu_priv *cpu_priv = &priv->cpu_priv;
if (!cpu_priv->sysclk_freq[tx] && cpu_priv->sysclk_ratio[tx])
sysclk_freq = priv->sample_rate * cpu_priv->sysclk_ratio[tx];
sysclk_freq = cpu_priv->sysclk_freq[tx];
ret = snd_soc_dai_set_sysclk(snd_soc_rtd_to_cpu(rtd, 0), cpu_priv->sysclk_id[tx],
cpu_priv->sysclk_dir[tx]);
if (cpu_priv->slot_width) {
if (!cpu_priv->slot_num)
cpu_priv->slot_num = 2;
cpu_priv->slot_num,
cpu_priv->slot_width);
priv->cpu_priv.sysclk_freq[TX] = priv->codec_priv[0].mclk_freq;
priv->cpu_priv.sysclk_freq[RX] = priv->codec_priv[0].mclk_freq;
priv->cpu_priv.sysclk_dir[TX] = SND_SOC_CLOCK_OUT;
priv->cpu_priv.sysclk_dir[RX] = SND_SOC_CLOCK_OUT;
priv->cpu_priv.slot_width = 32;
priv->cpu_priv.sysclk_dir[TX] = SND_SOC_CLOCK_OUT;
priv->cpu_priv.sysclk_dir[RX] = SND_SOC_CLOCK_OUT;
priv->cpu_priv.slot_width = 32;
priv->cpu_priv.sysclk_dir[TX] = SND_SOC_CLOCK_OUT;
priv->cpu_priv.sysclk_ratio[TX] = 256;
priv->cpu_priv.sysclk_dir[TX] = SND_SOC_CLOCK_IN;
priv->cpu_priv.sysclk_dir[RX] = SND_SOC_CLOCK_IN;
data->cpu_priv.sysclk_id[1] = FSL_SAI_CLK_MAST1;
data->cpu_priv.sysclk_id[0] = FSL_SAI_CLK_MAST1;
data->cpu_priv.slot_width = 24;
data->cpu_priv.slot_width = 32;
struct cpu_priv cpu_priv;
u32 slot_width = data->cpu_priv.slot_width;
ret = snd_soc_dai_set_sysclk(cpu_dai, data->cpu_priv.sysclk_id[tx],