ctlreg0
union ctlreg0 cr0, cr0_new;
union ctlreg0 cr0_old, cr0_new;
union ctlreg0 ctlreg0 = {.val = vcpu->arch.sie_block->gcr[0]};
if (!ctlreg0.lap || !is_low_address(gra))
union ctlreg0 ctlreg0;
ctlreg0.val = vcpu->arch.sie_block->gcr[0];
edat1 = ctlreg0.edat && test_kvm_facility(vcpu->kvm, 8);
iep = ctlreg0.iep && test_kvm_facility(vcpu->kvm, 130);
union ctlreg0 ctlreg0 = {.val = vcpu->arch.sie_block->gcr[0]};
if (!ctlreg0.lap)
union ctlreg0 cr0;
union ctlreg0 cr0;
union ctlreg0 cr0, cr0_new;