arch/loongarch/include/asm/loongarch.h

1334

return (csr_read(LOONGARCH_CSR_TLBREHI) & CSR_TLBREHI_PS) >> CSR_TLBREHI_PS_SHIFT;

arch/loongarch/include/asm/loongarch.h

1344

#define read_csr_entryhi() csr_read(LOONGARCH_CSR_TLBEHI)

arch/loongarch/include/asm/loongarch.h

1346

#define read_csr_entrylo0() csr_read(LOONGARCH_CSR_TLBELO0)

arch/loongarch/include/asm/loongarch.h

1348

#define read_csr_entrylo1() csr_read(LOONGARCH_CSR_TLBELO1)

arch/loongarch/include/asm/loongarch.h

1359

#define read_csr_prcfg1() csr_read(LOONGARCH_CSR_PRCFG1)

arch/loongarch/include/asm/loongarch.h

1361

#define read_csr_prcfg2() csr_read(LOONGARCH_CSR_PRCFG2)

arch/loongarch/include/asm/loongarch.h

1363

#define read_csr_prcfg3() csr_read(LOONGARCH_CSR_PRCFG3)

arch/loongarch/include/asm/loongarch.h

1370

#define read_csr_impctl1() csr_read(LOONGARCH_CSR_IMPCTL1)

arch/loongarch/kernel/time.c

241

init_offset = -(get_cycles() - csr_read(LOONGARCH_CSR_CNTC));

arch/loongarch/kernel/time.c

54

timer_config = csr_read(LOONGARCH_CSR_TCFG);

arch/loongarch/kernel/time.c

87

timer_config = csr_read(LOONGARCH_CSR_TCFG);

arch/loongarch/kernel/traps.c

1079

unsigned long merrera = csr_read(LOONGARCH_CSR_MERRERA);

arch/loongarch/power/hibernate.c

23

saved_pcpu_base = csr_read(PERCPU_BASE_KS);

arch/loongarch/power/suspend.c

34

saved_regs.pgd = csr_read(LOONGARCH_CSR_PGDL);

arch/loongarch/power/suspend.c

35

saved_regs.kpgd = csr_read(LOONGARCH_CSR_PGDH);

arch/loongarch/power/suspend.c

40

saved_regs.pcpu_base = csr_read(PERCPU_BASE_KS);

arch/riscv/errata/thead/errata.c

40

if (!(csr_read(CSR_TH_SXSTATUS) & SXSTATUS_MAEE))

arch/riscv/include/asm/irqflags.h

15

return csr_read(CSR_STATUS);

arch/riscv/include/asm/kvm_nacl.h

217

__r = csr_read(__csr); \

arch/riscv/include/asm/timex.h

53

return csr_read(CSR_TIME);

arch/riscv/include/asm/timex.h

59

return csr_read(CSR_TIMEH);

arch/riscv/include/asm/vdso/gettimeofday.h

79

return csr_read(CSR_TIME);

arch/riscv/include/asm/vector.h

126

return !!(csr_read(CSR_SSTATUS) & SR_VS);

arch/riscv/include/asm/vector.h

155

dest->vcsr = csr_read(CSR_VXSAT) | csr_read(CSR_VXRM) << CSR_VXRM_SHIFT;

arch/riscv/include/asm/vector.h

162

dest->vcsr = csr_read(CSR_VCSR);

arch/riscv/include/asm/vector.h

163

dest->vlenb = csr_read(CSR_VLENB);

arch/riscv/include/asm/vector.h

178

unsigned long status = csr_read(CSR_SSTATUS);

arch/riscv/kernel/alternative.c

35

cpu_mfr_info->vendor_id = csr_read(CSR_MVENDORID);

arch/riscv/kernel/alternative.c

36

cpu_mfr_info->arch_id = csr_read(CSR_MARCHID);

arch/riscv/kernel/alternative.c

37

cpu_mfr_info->imp_id = csr_read(CSR_MIMPID);

arch/riscv/kernel/cpu.c

148

ci->marchid = csr_read(CSR_MARCHID);

arch/riscv/kernel/cpu.c

162

ci->mvendorid = csr_read(CSR_MVENDORID);

arch/riscv/kernel/cpu.c

207

ci->mvendorid = csr_read(CSR_MVENDORID);

arch/riscv/kernel/cpu.c

209

ci->marchid = csr_read(CSR_MARCHID);

arch/riscv/kernel/cpu.c

210

ci->mimpid = csr_read(CSR_MIMPID);

arch/riscv/kernel/hibernate.c

102

hdr->saved_satp = csr_read(CSR_SATP);

arch/riscv/kernel/process.c

128

unsigned long tmp = csr_read(CSR_STATUS);

arch/riscv/kernel/process.c

132

(csr_read(CSR_STATUS) & SR_UXL) == SR_UXL_32;

arch/riscv/kernel/suspend.c

18

context->envcfg = csr_read(CSR_ENVCFG);

arch/riscv/kernel/suspend.c

19

context->tvec = csr_read(CSR_TVEC);

arch/riscv/kernel/suspend.c

20

context->ie = csr_read(CSR_IE);

arch/riscv/kernel/suspend.c

34

context->stimecmp = csr_read(CSR_STIMECMP);

arch/riscv/kernel/suspend.c

36

context->stimecmph = csr_read(CSR_STIMECMPH);

arch/riscv/kernel/suspend.c

40

context->satp = csr_read(CSR_SATP);

arch/riscv/kernel/traps.c

376

unsigned long tval = csr_read(CSR_TVAL);

arch/riscv/kernel/vector.c

48

this_vsize = csr_read(CSR_VLENB) * 32;

arch/riscv/kvm/aia.c

169

csr->vsiselect = csr_read(CSR_VSISELECT);

arch/riscv/kvm/aia.c

170

csr->hviprio1 = csr_read(CSR_HVIPRIO1);

arch/riscv/kvm/aia.c

171

csr->hviprio2 = csr_read(CSR_HVIPRIO2);

arch/riscv/kvm/aia.c

173

csr->vsieh = csr_read(CSR_VSIEH);

arch/riscv/kvm/aia.c

174

csr->hviph = csr_read(CSR_HVIPH);

arch/riscv/kvm/aia.c

175

csr->hviprio1h = csr_read(CSR_HVIPRIO1H);

arch/riscv/kvm/aia.c

176

csr->hviprio2h = csr_read(CSR_HVIPRIO2H);

arch/riscv/kvm/aia.c

471

hgei_mask = csr_read(CSR_HGEIP) & csr_read(CSR_HGEIE);

arch/riscv/kvm/aia.c

609

if (csr_read(CSR_HGEIE) & BIT(i)) {

arch/riscv/kvm/aia.c

633

kvm_riscv_aia_nr_hgei = fls_long(csr_read(CSR_HGEIE));

arch/riscv/kvm/aia_imsic.c

380

old_vsiselect = csr_read(CSR_VSISELECT);

arch/riscv/kvm/aia_imsic.c

381

old_hstatus = csr_read(CSR_HSTATUS);

arch/riscv/kvm/aia_imsic.c

452

old_vsiselect = csr_read(CSR_VSISELECT);

arch/riscv/kvm/aia_imsic.c

453

old_hstatus = csr_read(CSR_HSTATUS);

arch/riscv/kvm/aia_imsic.c

529

old_vsiselect = csr_read(CSR_VSISELECT);

arch/riscv/kvm/aia_imsic.c

530

old_hstatus = csr_read(CSR_HSTATUS);

arch/riscv/kvm/aia_imsic.c

567

old_vsiselect = csr_read(CSR_VSISELECT);

arch/riscv/kvm/aia_imsic.c

568

old_hstatus = csr_read(CSR_HSTATUS);

arch/riscv/kvm/aia_imsic.c

66

__r = csr_read(CSR_VSIREG); \

arch/riscv/kvm/aia_imsic.c

704

ret = !!(csr_read(CSR_HGEIP) & BIT(imsic->vsfile_hgei));

arch/riscv/kvm/gstage.c

321

if ((csr_read(CSR_HGATP) >> HGATP_MODE_SHIFT) == HGATP_MODE_SV57X4) {

arch/riscv/kvm/gstage.c

329

if ((csr_read(CSR_HGATP) >> HGATP_MODE_SHIFT) == HGATP_MODE_SV48X4) {

arch/riscv/kvm/gstage.c

337

if ((csr_read(CSR_HGATP) >> HGATP_MODE_SHIFT) == HGATP_MODE_SV39X4) {

arch/riscv/kvm/gstage.c

345

if ((csr_read(CSR_HGATP) >> HGATP_MODE_SHIFT) == HGATP_MODE_SV32X4) {

arch/riscv/kvm/vcpu.c

673

csr->vsstatus = csr_read(CSR_VSSTATUS);

arch/riscv/kvm/vcpu.c

674

csr->vsie = csr_read(CSR_VSIE);

arch/riscv/kvm/vcpu.c

675

csr->vstvec = csr_read(CSR_VSTVEC);

arch/riscv/kvm/vcpu.c

676

csr->vsscratch = csr_read(CSR_VSSCRATCH);

arch/riscv/kvm/vcpu.c

677

csr->vsepc = csr_read(CSR_VSEPC);

arch/riscv/kvm/vcpu.c

678

csr->vscause = csr_read(CSR_VSCAUSE);

arch/riscv/kvm/vcpu.c

679

csr->vstval = csr_read(CSR_VSTVAL);

arch/riscv/kvm/vcpu.c

680

csr->hvip = csr_read(CSR_HVIP);

arch/riscv/kvm/vcpu.c

681

csr->vsatp = csr_read(CSR_VSATP);

arch/riscv/kvm/vcpu.c

851

trap->htval = csr_read(CSR_HTVAL);

arch/riscv/kvm/vcpu.c

852

trap->htinst = csr_read(CSR_HTINST);

arch/riscv/kvm/vcpu.c

856

trap->scause = csr_read(CSR_SCAUSE);

arch/riscv/kvm/vcpu.c

857

trap->stval = csr_read(CSR_STVAL);

arch/riscv/kvm/vmid.c

30

vmid_bits = csr_read(CSR_HGATP);

arch/riscv/mm/context.c

232

old = csr_read(CSR_SATP);

arch/riscv/mm/context.c

235

asid_bits = (csr_read(CSR_SATP) >> SATP_ASID_SHIFT) & SATP_ASID_MASK;

arch/riscv/mm/fault.c

191

pfn = csr_read(CSR_SATP) & SATP_PPN;

drivers/acpi/riscv/cppc.c

72

data->ret.value = csr_read(CSR_TIME);

drivers/irqchip/irq-aclint-sswi.c

193

!(csr_read(THEAD_C9XX_CSR_SXSTATUS) & THEAD_C9XX_SXSTATUS_CLINTEE))

drivers/irqchip/irq-loongarch-avec.c

182

isr = csr_read(LOONGARCH_CSR_ISR0);

drivers/irqchip/irq-loongarch-avec.c

185

isr = csr_read(LOONGARCH_CSR_ISR1);

drivers/irqchip/irq-loongarch-avec.c

188

isr = csr_read(LOONGARCH_CSR_ISR2);

drivers/irqchip/irq-loongarch-avec.c

191

isr = csr_read(LOONGARCH_CSR_ISR3);

drivers/irqchip/irq-loongarch-avec.c

239

unsigned long vector = csr_read(LOONGARCH_CSR_IRR);

drivers/irqchip/irq-riscv-imsic-state.c

38

return csr_read(CSR_IREG);

drivers/irqchip/irq-riscv-intc.c

41

while ((topi = csr_read(CSR_TOPI)))

drivers/perf/riscv_pmu.c

95

__val = csr_read(__csr_num); \

drivers/perf/riscv_pmu_sbi.c

787

csr_read(CSR_SCOUNTEREN) | BIT(pmu_sbi_csr_index(event)));

drivers/perf/riscv_pmu_sbi.c

796

csr_read(CSR_SCOUNTEREN) & ~BIT(pmu_sbi_csr_index(event)));

tools/lib/perf/mmap.c

430

__val = csr_read(__csr_num); \

tools/testing/selftests/kvm/include/loongarch/arch_timer.h

31

return csr_read(LOONGARCH_CSR_TCFG);

tools/testing/selftests/kvm/include/loongarch/arch_timer.h

36

return csr_read(LOONGARCH_CSR_TVAL);

tools/testing/selftests/kvm/include/loongarch/arch_timer.h

48

val = csr_read(LOONGARCH_CSR_ECFG);

tools/testing/selftests/kvm/include/loongarch/arch_timer.h

57

val = csr_read(LOONGARCH_CSR_ECFG);

tools/testing/selftests/kvm/include/riscv/arch_timer.h

27

return csr_read(CSR_TIME);

tools/testing/selftests/kvm/include/riscv/arch_timer.h

37

return csr_read(CSR_STIMECMP);

tools/testing/selftests/kvm/lib/loongarch/processor.c

227

return csr_read(LOONGARCH_CSR_CPUID);

tools/testing/selftests/kvm/lib/riscv/processor.c

475

return csr_read(CSR_SSCRATCH);

tools/testing/selftests/kvm/loongarch/arch_timer.c

19

estat = csr_read(LOONGARCH_CSR_ESTAT);

tools/testing/selftests/kvm/riscv/sbi_pmu_test.c

54

__val = csr_read(__csr_num); \

tools/testing/selftests/riscv/cfi/shadowstack.c

30

ssp = csr_read(CSR_SSP);

tools/testing/selftests/riscv/cfi/shadowstack.c

50

ssp = csr_read(CSR_SSP);