arch/alpha/include/asm/core_titan.h

36

titan_64 csc;

arch/alpha/include/asm/core_tsunami.h

35

tsunami_64 csc;

arch/alpha/kernel/core_titan.c

355

titan_pchip1_present = TITAN_cchip->csc.csr & 1L<<14;

arch/alpha/kernel/core_titan.c

372

printk("%s: CSR_CSC 0x%lx\n", __func__, TITAN_cchip->csc.csr);

arch/alpha/kernel/core_tsunami.c

396

printk("%s: CSR_CSC 0x%lx\n", __func__, TSUNAMI_cchip->csc.csr);

arch/alpha/kernel/core_tsunami.c

417

if (TSUNAMI_cchip->csc.csr & 1L<<14)

arch/alpha/kernel/core_tsunami.c

448

if (TSUNAMI_cchip->csc.csr & 1L<<14)

arch/alpha/kernel/core_tsunami.c

467

if (TSUNAMI_cchip->csc.csr & 1L<<14)

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c

121

.csc = 14,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c

238

.csc = 14,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c

357

.csc = 14,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c

453

.csc = 14,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c

545

.csc = 16,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.h

221

int csc;

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

1040

if (desc->layout.csc)

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

1208

if (plane->layer.desc->layout.csc)

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

964

desc->layout.csc + i,

drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_plane.c

988

desc->layout.csc + i,

drivers/gpu/drm/i915/display/intel_color.c

1834

vlv_load_wgc_csc(crtc, &crtc_state->csc);

drivers/gpu/drm/i915/display/intel_color.c

188

static void intel_csc_clear(struct intel_csc_matrix *csc)

drivers/gpu/drm/i915/display/intel_color.c

190

memset(csc, 0, sizeof(*csc));

drivers/gpu/drm/i915/display/intel_color.c

1915

chv_load_cgm_csc(crtc, &crtc_state->csc);

drivers/gpu/drm/i915/display/intel_color.c

226

const struct intel_csc_matrix *csc)

drivers/gpu/drm/i915/display/intel_color.c

232

csc->preoff[0]);

drivers/gpu/drm/i915/display/intel_color.c

234

csc->preoff[1]);

drivers/gpu/drm/i915/display/intel_color.c

236

csc->preoff[2]);

drivers/gpu/drm/i915/display/intel_color.c

239

csc->coeff[0] << 16 | csc->coeff[1]);

drivers/gpu/drm/i915/display/intel_color.c

241

csc->coeff[2] << 16);

drivers/gpu/drm/i915/display/intel_color.c

244

csc->coeff[3] << 16 | csc->coeff[4]);

drivers/gpu/drm/i915/display/intel_color.c

246

csc->coeff[5] << 16);

drivers/gpu/drm/i915/display/intel_color.c

249

csc->coeff[6] << 16 | csc->coeff[7]);

drivers/gpu/drm/i915/display/intel_color.c

251

csc->coeff[8] << 16);

drivers/gpu/drm/i915/display/intel_color.c

257

csc->postoff[0]);

drivers/gpu/drm/i915/display/intel_color.c

259

csc->postoff[1]);

drivers/gpu/drm/i915/display/intel_color.c

261

csc->postoff[2]);

drivers/gpu/drm/i915/display/intel_color.c

265

struct intel_csc_matrix *csc)

drivers/gpu/drm/i915/display/intel_color.c

271

csc->preoff[0] = intel_de_read_fw(display, PIPE_CSC_PREOFF_HI(pipe));

drivers/gpu/drm/i915/display/intel_color.c

272

csc->preoff[1] = intel_de_read_fw(display, PIPE_CSC_PREOFF_ME(pipe));

drivers/gpu/drm/i915/display/intel_color.c

273

csc->preoff[2] = intel_de_read_fw(display, PIPE_CSC_PREOFF_LO(pipe));

drivers/gpu/drm/i915/display/intel_color.c

276

csc->coeff[0] = tmp >> 16;

drivers/gpu/drm/i915/display/intel_color.c

277

csc->coeff[1] = tmp & 0xffff;

drivers/gpu/drm/i915/display/intel_color.c

279

csc->coeff[2] = tmp >> 16;

drivers/gpu/drm/i915/display/intel_color.c

282

csc->coeff[3] = tmp >> 16;

drivers/gpu/drm/i915/display/intel_color.c

283

csc->coeff[4] = tmp & 0xffff;

drivers/gpu/drm/i915/display/intel_color.c

285

csc->coeff[5] = tmp >> 16;

drivers/gpu/drm/i915/display/intel_color.c

288

csc->coeff[6] = tmp >> 16;

drivers/gpu/drm/i915/display/intel_color.c

289

csc->coeff[7] = tmp & 0xffff;

drivers/gpu/drm/i915/display/intel_color.c

291

csc->coeff[8] = tmp >> 16;

drivers/gpu/drm/i915/display/intel_color.c

296

csc->postoff[0] = intel_de_read_fw(display, PIPE_CSC_POSTOFF_HI(pipe));

drivers/gpu/drm/i915/display/intel_color.c

297

csc->postoff[1] = intel_de_read_fw(display, PIPE_CSC_POSTOFF_ME(pipe));

drivers/gpu/drm/i915/display/intel_color.c

298

csc->postoff[2] = intel_de_read_fw(display, PIPE_CSC_POSTOFF_LO(pipe));

drivers/gpu/drm/i915/display/intel_color.c

306

ilk_read_pipe_csc(crtc, &crtc_state->csc);

drivers/gpu/drm/i915/display/intel_color.c

327

ilk_read_pipe_csc(crtc, &crtc_state->csc);

drivers/gpu/drm/i915/display/intel_color.c

332

const struct intel_csc_matrix *csc)

drivers/gpu/drm/i915/display/intel_color.c

338

csc->preoff[0]);

drivers/gpu/drm/i915/display/intel_color.c

340

csc->preoff[1]);

drivers/gpu/drm/i915/display/intel_color.c

342

csc->preoff[2]);

drivers/gpu/drm/i915/display/intel_color.c

345

csc->coeff[0] << 16 | csc->coeff[1]);

drivers/gpu/drm/i915/display/intel_color.c

347

csc->coeff[2] << 16);

drivers/gpu/drm/i915/display/intel_color.c

350

csc->coeff[3] << 16 | csc->coeff[4]);

drivers/gpu/drm/i915/display/intel_color.c

352

csc->coeff[5] << 16);

drivers/gpu/drm/i915/display/intel_color.c

355

csc->coeff[6] << 16 | csc->coeff[7]);

drivers/gpu/drm/i915/display/intel_color.c

357

csc->coeff[8] << 16);

drivers/gpu/drm/i915/display/intel_color.c

360

csc->postoff[0]);

drivers/gpu/drm/i915/display/intel_color.c

362

csc->postoff[1]);

drivers/gpu/drm/i915/display/intel_color.c

364

csc->postoff[2]);

drivers/gpu/drm/i915/display/intel_color.c

368

struct intel_csc_matrix *csc)

drivers/gpu/drm/i915/display/intel_color.c

374

csc->preoff[0] = intel_de_read_fw(display, PIPE_CSC_OUTPUT_PREOFF_HI(pipe));

drivers/gpu/drm/i915/display/intel_color.c

375

csc->preoff[1] = intel_de_read_fw(display, PIPE_CSC_OUTPUT_PREOFF_ME(pipe));

drivers/gpu/drm/i915/display/intel_color.c

376

csc->preoff[2] = intel_de_read_fw(display, PIPE_CSC_OUTPUT_PREOFF_LO(pipe));

drivers/gpu/drm/i915/display/intel_color.c

379

csc->coeff[0] = tmp >> 16;

drivers/gpu/drm/i915/display/intel_color.c

380

csc->coeff[1] = tmp & 0xffff;

drivers/gpu/drm/i915/display/intel_color.c

382

csc->coeff[2] = tmp >> 16;

drivers/gpu/drm/i915/display/intel_color.c

385

csc->coeff[3] = tmp >> 16;

drivers/gpu/drm/i915/display/intel_color.c

386

csc->coeff[4] = tmp & 0xffff;

drivers/gpu/drm/i915/display/intel_color.c

388

csc->coeff[5] = tmp >> 16;

drivers/gpu/drm/i915/display/intel_color.c

391

csc->coeff[6] = tmp >> 16;

drivers/gpu/drm/i915/display/intel_color.c

392

csc->coeff[7] = tmp & 0xffff;

drivers/gpu/drm/i915/display/intel_color.c

394

csc->coeff[8] = tmp >> 16;

drivers/gpu/drm/i915/display/intel_color.c

396

csc->postoff[0] = intel_de_read_fw(display, PIPE_CSC_OUTPUT_POSTOFF_HI(pipe));

drivers/gpu/drm/i915/display/intel_color.c

397

csc->postoff[1] = intel_de_read_fw(display, PIPE_CSC_OUTPUT_POSTOFF_ME(pipe));

drivers/gpu/drm/i915/display/intel_color.c

398

csc->postoff[2] = intel_de_read_fw(display, PIPE_CSC_OUTPUT_POSTOFF_LO(pipe));

drivers/gpu/drm/i915/display/intel_color.c

411

ilk_read_pipe_csc(crtc, &crtc_state->csc);

drivers/gpu/drm/i915/display/intel_color.c

468

struct intel_csc_matrix *csc,

drivers/gpu/drm/i915/display/intel_color.c

479

ilk_csc_copy(display, csc, &ilk_csc_matrix_limited_range);

drivers/gpu/drm/i915/display/intel_color.c

481

ilk_csc_copy(display, csc, &ilk_csc_matrix_identity);

drivers/gpu/drm/i915/display/intel_color.c

501

csc->coeff[i] = 0;

drivers/gpu/drm/i915/display/intel_color.c

505

csc->coeff[i] |= 1 << 15;

drivers/gpu/drm/i915/display/intel_color.c

508

csc->coeff[i] |= (3 << 12) |

drivers/gpu/drm/i915/display/intel_color.c

511

csc->coeff[i] |= (2 << 12) |

drivers/gpu/drm/i915/display/intel_color.c

514

csc->coeff[i] |= (1 << 12) |

drivers/gpu/drm/i915/display/intel_color.c

517

csc->coeff[i] |= ILK_CSC_COEFF_FP(abs_coeff, 9);

drivers/gpu/drm/i915/display/intel_color.c

519

csc->coeff[i] |= (7 << 12) |

drivers/gpu/drm/i915/display/intel_color.c

522

csc->coeff[i] |= (6 << 12) |

drivers/gpu/drm/i915/display/intel_color.c

535

ilk_csc_convert_ctm(crtc_state, &crtc_state->csc, limited_color_range);

drivers/gpu/drm/i915/display/intel_color.c

539

ilk_csc_copy(display, &crtc_state->csc, &ilk_csc_matrix_rgb_to_ycbcr);

drivers/gpu/drm/i915/display/intel_color.c

543

ilk_csc_copy(display, &crtc_state->csc, &ilk_csc_matrix_limited_range);

drivers/gpu/drm/i915/display/intel_color.c

553

ilk_csc_copy(display, &crtc_state->csc, &ilk_csc_matrix_identity);

drivers/gpu/drm/i915/display/intel_color.c

555

intel_csc_clear(&crtc_state->csc);

drivers/gpu/drm/i915/display/intel_color.c

565

ilk_update_pipe_csc(dsb, crtc, &crtc_state->csc);

drivers/gpu/drm/i915/display/intel_color.c

575

ilk_csc_convert_ctm(crtc_state, &crtc_state->csc, false);

drivers/gpu/drm/i915/display/intel_color.c

579

intel_csc_clear(&crtc_state->csc);

drivers/gpu/drm/i915/display/intel_color.c

603

ilk_update_pipe_csc(dsb, crtc, &crtc_state->csc);

drivers/gpu/drm/i915/display/intel_color.c

639

struct intel_csc_matrix *csc)

drivers/gpu/drm/i915/display/intel_color.c

645

csc->coeff[i] = ctm_to_twos_complement(ctm->matrix[i], 2, 10);

drivers/gpu/drm/i915/display/intel_color.c

649

const struct intel_csc_matrix *csc)

drivers/gpu/drm/i915/display/intel_color.c

655

csc->coeff[1] << 16 | csc->coeff[0]);

drivers/gpu/drm/i915/display/intel_color.c

657

csc->coeff[2]);

drivers/gpu/drm/i915/display/intel_color.c

660

csc->coeff[4] << 16 | csc->coeff[3]);

drivers/gpu/drm/i915/display/intel_color.c

662

csc->coeff[5]);

drivers/gpu/drm/i915/display/intel_color.c

665

csc->coeff[7] << 16 | csc->coeff[6]);

drivers/gpu/drm/i915/display/intel_color.c

667

csc->coeff[8]);

drivers/gpu/drm/i915/display/intel_color.c

671

struct intel_csc_matrix *csc)

drivers/gpu/drm/i915/display/intel_color.c

678

csc->coeff[0] = tmp & 0xffff;

drivers/gpu/drm/i915/display/intel_color.c

679

csc->coeff[1] = tmp >> 16;

drivers/gpu/drm/i915/display/intel_color.c

682

csc->coeff[2] = tmp & 0xffff;

drivers/gpu/drm/i915/display/intel_color.c

685

csc->coeff[3] = tmp & 0xffff;

drivers/gpu/drm/i915/display/intel_color.c

686

csc->coeff[4] = tmp >> 16;

drivers/gpu/drm/i915/display/intel_color.c

689

csc->coeff[5] = tmp & 0xffff;

drivers/gpu/drm/i915/display/intel_color.c

692

csc->coeff[6] = tmp & 0xffff;

drivers/gpu/drm/i915/display/intel_color.c

693

csc->coeff[7] = tmp >> 16;

drivers/gpu/drm/i915/display/intel_color.c

696

csc->coeff[8] = tmp & 0xffff;

drivers/gpu/drm/i915/display/intel_color.c

704

vlv_read_wgc_csc(crtc, &crtc_state->csc);

drivers/gpu/drm/i915/display/intel_color.c

714

vlv_wgc_csc_convert_ctm(crtc_state, &crtc_state->csc);

drivers/gpu/drm/i915/display/intel_color.c

718

intel_csc_clear(&crtc_state->csc);

drivers/gpu/drm/i915/display/intel_color.c

731

struct intel_csc_matrix *csc)

drivers/gpu/drm/i915/display/intel_color.c

737

csc->coeff[i] = ctm_to_twos_complement(ctm->matrix[i], 4, 12);

drivers/gpu/drm/i915/display/intel_color.c

751

const struct intel_csc_matrix *csc)

drivers/gpu/drm/i915/display/intel_color.c

757

csc->coeff[1] << 16 | csc->coeff[0]);

drivers/gpu/drm/i915/display/intel_color.c

759

csc->coeff[3] << 16 | csc->coeff[2]);

drivers/gpu/drm/i915/display/intel_color.c

761

csc->coeff[5] << 16 | csc->coeff[4]);

drivers/gpu/drm/i915/display/intel_color.c

763

csc->coeff[7] << 16 | csc->coeff[6]);

drivers/gpu/drm/i915/display/intel_color.c

765

csc->coeff[8]);

drivers/gpu/drm/i915/display/intel_color.c

769

struct intel_csc_matrix *csc)

drivers/gpu/drm/i915/display/intel_color.c

776

csc->coeff[0] = tmp & 0xffff;

drivers/gpu/drm/i915/display/intel_color.c

777

csc->coeff[1] = tmp >> 16;

drivers/gpu/drm/i915/display/intel_color.c

780

csc->coeff[2] = tmp & 0xffff;

drivers/gpu/drm/i915/display/intel_color.c

781

csc->coeff[3] = tmp >> 16;

drivers/gpu/drm/i915/display/intel_color.c

784

csc->coeff[4] = tmp & 0xffff;

drivers/gpu/drm/i915/display/intel_color.c

785

csc->coeff[5] = tmp >> 16;

drivers/gpu/drm/i915/display/intel_color.c

788

csc->coeff[6] = tmp & 0xffff;

drivers/gpu/drm/i915/display/intel_color.c

789

csc->coeff[7] = tmp >> 16;

drivers/gpu/drm/i915/display/intel_color.c

792

csc->coeff[8] = tmp & 0xffff;

drivers/gpu/drm/i915/display/intel_color.c

800

chv_read_cgm_csc(crtc, &crtc_state->csc);

drivers/gpu/drm/i915/display/intel_color.c

812

chv_cgm_csc_convert_ctm(crtc_state, &crtc_state->csc);

drivers/gpu/drm/i915/display/intel_color.c

816

crtc_state->csc = chv_cgm_csc_matrix_identity;

drivers/gpu/drm/i915/display/intel_crtc_state_dump.c

143

const struct intel_csc_matrix *csc)

drivers/gpu/drm/i915/display/intel_crtc_state_dump.c

148

csc->preoff[0], csc->preoff[1], csc->preoff[2]);

drivers/gpu/drm/i915/display/intel_crtc_state_dump.c

152

csc->coeff[3 * i + 0],

drivers/gpu/drm/i915/display/intel_crtc_state_dump.c

153

csc->coeff[3 * i + 1],

drivers/gpu/drm/i915/display/intel_crtc_state_dump.c

154

csc->coeff[3 * i + 2]);

drivers/gpu/drm/i915/display/intel_crtc_state_dump.c

160

csc->postoff[0], csc->postoff[1], csc->postoff[2]);

drivers/gpu/drm/i915/display/intel_crtc_state_dump.c

165

const struct intel_csc_matrix *csc)

drivers/gpu/drm/i915/display/intel_crtc_state_dump.c

171

csc->coeff[3 * i + 0],

drivers/gpu/drm/i915/display/intel_crtc_state_dump.c

172

csc->coeff[3 * i + 1],

drivers/gpu/drm/i915/display/intel_crtc_state_dump.c

173

csc->coeff[3 * i + 2]);

drivers/gpu/drm/i915/display/intel_crtc_state_dump.c

375

ilk_dump_csc(display, &p, "pipe csc", &pipe_config->csc);

drivers/gpu/drm/i915/display/intel_crtc_state_dump.c

377

vlv_dump_csc(&p, "cgm csc", &pipe_config->csc);

drivers/gpu/drm/i915/display/intel_crtc_state_dump.c

379

vlv_dump_csc(&p, "wgc csc", &pipe_config->csc);

drivers/gpu/drm/i915/display/intel_display.c

5383

PIPE_CONF_CHECK_CSC(csc);

drivers/gpu/drm/i915/display/intel_display_types.h

1045

struct intel_csc_matrix csc, output_csc;

drivers/gpu/drm/i915/display/intel_sprite.c

112

SPCSC_C1(csc[1]) | SPCSC_C0(csc[0]));

drivers/gpu/drm/i915/display/intel_sprite.c

114

SPCSC_C1(csc[3]) | SPCSC_C0(csc[2]));

drivers/gpu/drm/i915/display/intel_sprite.c

116

SPCSC_C1(csc[5]) | SPCSC_C0(csc[4]));

drivers/gpu/drm/i915/display/intel_sprite.c

118

SPCSC_C1(csc[7]) | SPCSC_C0(csc[6]));

drivers/gpu/drm/i915/display/intel_sprite.c

119

intel_de_write_fw(display, SPCSCC8(plane_id), SPCSC_C0(csc[8]));

drivers/gpu/drm/i915/display/intel_sprite.c

98

const s16 *csc = csc_matrix[plane_state->hw.color_encoding];

drivers/gpu/drm/i915/display/skl_universal_plane.c

722

const u16 *csc = input_csc_matrix[plane_state->hw.color_encoding];

drivers/gpu/drm/i915/display/skl_universal_plane.c

725

ROFF(csc[0]) | GOFF(csc[1]));

drivers/gpu/drm/i915/display/skl_universal_plane.c

727

BOFF(csc[2]));

drivers/gpu/drm/i915/display/skl_universal_plane.c

729

ROFF(csc[3]) | GOFF(csc[4]));

drivers/gpu/drm/i915/display/skl_universal_plane.c

731

BOFF(csc[5]));

drivers/gpu/drm/i915/display/skl_universal_plane.c

733

ROFF(csc[6]) | GOFF(csc[7]));

drivers/gpu/drm/i915/display/skl_universal_plane.c

735

BOFF(csc[8]));

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cdm.c

175

u32 csc = 0;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cdm.c

195

csc |= CDM_CSC10_OP_MODE_DST_FMT_YUV;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cdm.c

196

csc &= ~CDM_CSC10_OP_MODE_SRC_FMT_YUV;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cdm.c

197

csc |= CDM_CSC10_OP_MODE_EN;

drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cdm.c

202

DPU_REG_WRITE(c, CDM_CSC_10_OPMODE, csc);

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

160

enum mdp4_pipe pipe, struct csc_cfg *csc)

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

164

for (i = 0; i < ARRAY_SIZE(csc->matrix); i++) {

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

166

csc->matrix[i]);

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

169

for (i = 0; i < ARRAY_SIZE(csc->post_bias) ; i++) {

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

171

csc->pre_bias[i]);

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

174

csc->post_bias[i]);

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

177

for (i = 0; i < ARRAY_SIZE(csc->post_clamp) ; i++) {

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

179

csc->pre_clamp[i]);

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

182

csc->post_clamp[i]);

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

316

struct csc_cfg *csc = mdp_get_default_csc_cfg(CSC_YUV2RGB);

drivers/gpu/drm/msm/disp/mdp4/mdp4_plane.c

320

mdp4_write_csc_config(mdp4_kms, pipe, csc);

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

494

struct csc_cfg *csc)

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

499

if (unlikely(!csc))

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

502

if ((csc->type == CSC_YUV2RGB) || (CSC_YUV2YUV == csc->type))

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

504

if ((csc->type == CSC_RGB2YUV) || (CSC_YUV2YUV == csc->type))

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

509

matrix = csc->matrix;

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

525

for (i = 0; i < ARRAY_SIZE(csc->pre_bias); i++) {

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

526

uint32_t *pre_clamp = csc->pre_clamp;

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

527

uint32_t *post_clamp = csc->post_clamp;

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

538

MDP5_PIPE_CSC_1_PRE_BIAS_REG_VALUE(csc->pre_bias[i]));

drivers/gpu/drm/msm/disp/mdp5/mdp5_plane.c

541

MDP5_PIPE_CSC_1_POST_BIAS_REG_VALUE(csc->post_bias[i]));

drivers/gpu/drm/nouveau/dispnv50/atom.h

225

} csc;

drivers/gpu/drm/nouveau/dispnv50/atom.h

271

bool csc:1;

drivers/gpu/drm/nouveau/dispnv50/base907c.c

144

u32 *val = &asyw->csc.matrix[j * 4 + i];

drivers/gpu/drm/nouveau/dispnv50/base907c.c

181

NVVAL(NV907C, SET_CSC_RED2RED, COEFF, asyw->csc.matrix[0]),

drivers/gpu/drm/nouveau/dispnv50/base907c.c

183

SET_CSC_GRN2RED, &asyw->csc.matrix[1], 11);

drivers/gpu/drm/nouveau/dispnv50/base907c.c

198

.csc = base907c_csc,

drivers/gpu/drm/nouveau/dispnv50/wndw.c

142

if (clr.csc ) wndw->func-> csc_clr(wndw);

drivers/gpu/drm/nouveau/dispnv50/wndw.c

170

if (asyw->set.csc ) wndw->func->csc_set (wndw, asyw);

drivers/gpu/drm/nouveau/dispnv50/wndw.c

427

if (wndw->func->csc && asyh->state.ctm) {

drivers/gpu/drm/nouveau/dispnv50/wndw.c

429

wndw->func->csc(wndw, asyw, ctm);

drivers/gpu/drm/nouveau/dispnv50/wndw.c

430

asyw->csc.valid = true;

drivers/gpu/drm/nouveau/dispnv50/wndw.c

431

asyw->set.csc = true;

drivers/gpu/drm/nouveau/dispnv50/wndw.c

433

asyw->csc.valid = false;

drivers/gpu/drm/nouveau/dispnv50/wndw.c

434

asyw->clr.csc = armw->csc.valid;

drivers/gpu/drm/nouveau/dispnv50/wndw.c

515

asyw->clr.csc = armw->csc.valid;

drivers/gpu/drm/nouveau/dispnv50/wndw.c

740

asyw->csc = armw->csc;

drivers/gpu/drm/nouveau/dispnv50/wndw.h

64

void (*csc)(struct nv50_wndw *, struct nv50_wndw_atom *,

drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c

185

NVVAL(NVC37E, SET_PARAMS, CSC, asyw->csc.valid) |

drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c

340

.csc = base907c_csc,

drivers/gpu/drm/nouveau/dispnv50/wndwc37e.c

49

PUSH_MTHD(push, NVC37E, SET_CSC_RED2RED, asyw->csc.matrix, 12);

drivers/gpu/drm/nouveau/dispnv50/wndwc57e.c

108

PUSH_MTHD(push, NVC57E, SET_FMT_COEFFICIENT_C00, asyw->csc.matrix, 12);

drivers/gpu/drm/nouveau/dispnv50/wndwc57e.c

228

.csc = base907c_csc,

drivers/gpu/drm/nouveau/dispnv50/wndwc67e.c

92

.csc = base907c_csc,

drivers/gpu/drm/nouveau/dispnv50/wndwca7e.c

228

.csc = base907c_csc,

drivers/gpu/drm/omapdrm/dss/dispc.c

883

const struct csc_coef_yuv2rgb *csc;

drivers/gpu/drm/omapdrm/dss/dispc.c

889

csc = &coefs_yuv2rgb_bt601_full;

drivers/gpu/drm/omapdrm/dss/dispc.c

891

csc = &coefs_yuv2rgb_bt601_lim;

drivers/gpu/drm/omapdrm/dss/dispc.c

895

csc = &coefs_yuv2rgb_bt709_full;

drivers/gpu/drm/omapdrm/dss/dispc.c

897

csc = &coefs_yuv2rgb_bt709_lim;

drivers/gpu/drm/omapdrm/dss/dispc.c

901

dispc_ovl_write_color_conv_coef(dispc, plane, csc);

drivers/gpu/drm/tidss/tidss_dispc.c

1530

void (*to_regval)(const struct dispc_csc_coef *csc, u32 *regval);

drivers/gpu/drm/tidss/tidss_dispc.c

1541

void dispc_csc_offset_regval(const struct dispc_csc_coef *csc, u32 *regval)

drivers/gpu/drm/tidss/tidss_dispc.c

1544

regval[5] = OVAL(csc->preoffset[0], csc->preoffset[1]);

drivers/gpu/drm/tidss/tidss_dispc.c

1545

regval[6] = OVAL(csc->preoffset[2], csc->postoffset[0]);

drivers/gpu/drm/tidss/tidss_dispc.c

1546

regval[7] = OVAL(csc->postoffset[1], csc->postoffset[2]);

drivers/gpu/drm/tidss/tidss_dispc.c

1552

void dispc_csc_yuv2rgb_regval(const struct dispc_csc_coef *csc, u32 *regval)

drivers/gpu/drm/tidss/tidss_dispc.c

1554

regval[0] = CVAL(csc->m[CSC_RY], csc->m[CSC_RCR]);

drivers/gpu/drm/tidss/tidss_dispc.c

1555

regval[1] = CVAL(csc->m[CSC_RCB], csc->m[CSC_GY]);

drivers/gpu/drm/tidss/tidss_dispc.c

1556

regval[2] = CVAL(csc->m[CSC_GCR], csc->m[CSC_GCB]);

drivers/gpu/drm/tidss/tidss_dispc.c

1557

regval[3] = CVAL(csc->m[CSC_BY], csc->m[CSC_BCR]);

drivers/gpu/drm/tidss/tidss_dispc.c

1558

regval[4] = CVAL(csc->m[CSC_BCB], 0);

drivers/gpu/drm/tidss/tidss_dispc.c

1560

dispc_csc_offset_regval(csc, regval);

drivers/gpu/drm/tidss/tidss_dispc.c

1564

void dispc_csc_rgb2yuv_regval(const struct dispc_csc_coef *csc, u32 *regval)

drivers/gpu/drm/tidss/tidss_dispc.c

1566

regval[0] = CVAL(csc->m[CSC_YR], csc->m[CSC_YG]);

drivers/gpu/drm/tidss/tidss_dispc.c

1567

regval[1] = CVAL(csc->m[CSC_YB], csc->m[CSC_CRR]);

drivers/gpu/drm/tidss/tidss_dispc.c

1568

regval[2] = CVAL(csc->m[CSC_CRG], csc->m[CSC_CRB]);

drivers/gpu/drm/tidss/tidss_dispc.c

1569

regval[3] = CVAL(csc->m[CSC_CBR], csc->m[CSC_CBG]);

drivers/gpu/drm/tidss/tidss_dispc.c

1570

regval[4] = CVAL(csc->m[CSC_CBB], 0);

drivers/gpu/drm/tidss/tidss_dispc.c

1572

dispc_csc_offset_regval(csc, regval);

drivers/gpu/drm/tidss/tidss_dispc.c

1575

static void dispc_csc_cpr_regval(const struct dispc_csc_coef *csc,

drivers/gpu/drm/tidss/tidss_dispc.c

1578

regval[0] = CVAL(csc->m[CSC_RR], csc->m[CSC_RG]);

drivers/gpu/drm/tidss/tidss_dispc.c

1579

regval[1] = CVAL(csc->m[CSC_RB], csc->m[CSC_GR]);

drivers/gpu/drm/tidss/tidss_dispc.c

1580

regval[2] = CVAL(csc->m[CSC_GG], csc->m[CSC_GB]);

drivers/gpu/drm/tidss/tidss_dispc.c

1581

regval[3] = CVAL(csc->m[CSC_BR], csc->m[CSC_BG]);

drivers/gpu/drm/tidss/tidss_dispc.c

1582

regval[4] = CVAL(csc->m[CSC_BB], 0);

drivers/gpu/drm/tidss/tidss_dispc.c

1584

dispc_csc_offset_regval(csc, regval);

drivers/gpu/drm/tidss/tidss_dispc.c

1590

const struct dispc_csc_coef *csc)

drivers/gpu/drm/tidss/tidss_dispc.c

1601

csc->to_regval(csc, regval);

drivers/gpu/drm/tidss/tidss_dispc.c

1605

__func__, csc->name);

drivers/gpu/drm/tidss/tidss_dispc.c

1613

const struct dispc_csc_coef *csc)

drivers/gpu/drm/tidss/tidss_dispc.c

1624

csc->to_regval(csc, regval);

drivers/gpu/drm/tidss/tidss_dispc.c

1682

const struct dispc_csc_coef *csc;

drivers/gpu/drm/tidss/tidss_dispc.c

1703

return dispc_csc_table[i].csc;

drivers/gpu/drm/tidss/tidss_dispc.c

2634

static void dispc_k2g_vp_csc_cpr_regval(const struct dispc_csc_coef *csc,

drivers/gpu/drm/tidss/tidss_dispc.c

2637

regval[0] = CVAL(csc->m[CSC_BB], csc->m[CSC_BG], csc->m[CSC_BR]);

drivers/gpu/drm/tidss/tidss_dispc.c

2638

regval[1] = CVAL(csc->m[CSC_GB], csc->m[CSC_GG], csc->m[CSC_GR]);

drivers/gpu/drm/tidss/tidss_dispc.c

2639

regval[2] = CVAL(csc->m[CSC_RB], csc->m[CSC_RG], csc->m[CSC_RR]);

drivers/gpu/drm/tidss/tidss_dispc.c

2645

const struct dispc_csc_coef *csc)

drivers/gpu/drm/tidss/tidss_dispc.c

2654

dispc_k2g_vp_csc_cpr_regval(csc, regval);

drivers/gpu/drm/tidss/tidss_dispc.c

2710

const struct dispc_csc_coef *csc)

drivers/gpu/drm/tidss/tidss_dispc.c

2720

csc->to_regval(csc, regval);

drivers/gpu/drm/tidss/tidss_dispc.c

2733

struct dispc_csc_coef csc;

drivers/gpu/drm/tidss/tidss_dispc.c

2735

dispc_csc_from_ctm(ctm, &csc);

drivers/gpu/drm/tidss/tidss_dispc.c

2736

dispc_k3_vp_write_csc(dispc, hw_videoport, &csc);

drivers/gpu/drm/vc4/vc4_hdmi.c

1203

const u16 (*csc)[4];

drivers/gpu/drm/vc4/vc4_hdmi.c

1218

csc = vc5_hdmi_find_yuv_csc_coeffs(vc4_hdmi, state->colorspace, !!lim_range);

drivers/gpu/drm/vc4/vc4_hdmi.c

1220

vc5_hdmi_set_csc_coeffs_swap(vc4_hdmi, csc);

drivers/gpu/drm/vc4/vc4_hdmi.c

1224

csc = vc5_hdmi_find_yuv_csc_coeffs(vc4_hdmi, state->colorspace, !!lim_range);

drivers/gpu/drm/vc4/vc4_hdmi.c

1237

vc5_hdmi_set_csc_coeffs(vc4_hdmi, csc);

drivers/gpu/drm/vc4/vc4_hvs.c

1426

u32 csc[3][5];

drivers/gpu/drm/vc4/vc4_hvs.c

1432

.csc = {

drivers/gpu/drm/vc4/vc4_hvs.c

1439

.csc = {

drivers/gpu/drm/vc4/vc4_hvs.c

1446

.csc = {

drivers/gpu/drm/vc4/vc4_hvs.c

1455

.csc = {

drivers/gpu/drm/vc4/vc4_hvs.c

1462

.csc = {

drivers/gpu/drm/vc4/vc4_hvs.c

1469

.csc = {

drivers/gpu/drm/vc4/vc4_hvs.c

1496

HVS_WRITE(CFC1_N_MA_CSC_COEFF_C00(i), coeffs->csc[0][0]);

drivers/gpu/drm/vc4/vc4_hvs.c

1497

HVS_WRITE(CFC1_N_MA_CSC_COEFF_C01(i), coeffs->csc[0][1]);

drivers/gpu/drm/vc4/vc4_hvs.c

1498

HVS_WRITE(CFC1_N_MA_CSC_COEFF_C02(i), coeffs->csc[0][2]);

drivers/gpu/drm/vc4/vc4_hvs.c

1499

HVS_WRITE(CFC1_N_MA_CSC_COEFF_C03(i), coeffs->csc[0][3]);

drivers/gpu/drm/vc4/vc4_hvs.c

1500

HVS_WRITE(CFC1_N_MA_CSC_COEFF_C04(i), coeffs->csc[0][4]);

drivers/gpu/drm/vc4/vc4_hvs.c

1502

HVS_WRITE(CFC1_N_MA_CSC_COEFF_C10(i), coeffs->csc[1][0]);

drivers/gpu/drm/vc4/vc4_hvs.c

1503

HVS_WRITE(CFC1_N_MA_CSC_COEFF_C11(i), coeffs->csc[1][1]);

drivers/gpu/drm/vc4/vc4_hvs.c

1504

HVS_WRITE(CFC1_N_MA_CSC_COEFF_C12(i), coeffs->csc[1][2]);

drivers/gpu/drm/vc4/vc4_hvs.c

1505

HVS_WRITE(CFC1_N_MA_CSC_COEFF_C13(i), coeffs->csc[1][3]);

drivers/gpu/drm/vc4/vc4_hvs.c

1506

HVS_WRITE(CFC1_N_MA_CSC_COEFF_C14(i), coeffs->csc[1][4]);

drivers/gpu/drm/vc4/vc4_hvs.c

1508

HVS_WRITE(CFC1_N_MA_CSC_COEFF_C20(i), coeffs->csc[2][0]);

drivers/gpu/drm/vc4/vc4_hvs.c

1509

HVS_WRITE(CFC1_N_MA_CSC_COEFF_C21(i), coeffs->csc[2][1]);

drivers/gpu/drm/vc4/vc4_hvs.c

1510

HVS_WRITE(CFC1_N_MA_CSC_COEFF_C22(i), coeffs->csc[2][2]);

drivers/gpu/drm/vc4/vc4_hvs.c

1511

HVS_WRITE(CFC1_N_MA_CSC_COEFF_C23(i), coeffs->csc[2][3]);

drivers/gpu/drm/vc4/vc4_hvs.c

1512

HVS_WRITE(CFC1_N_MA_CSC_COEFF_C24(i), coeffs->csc[2][4]);

drivers/gpu/ipu-v3/ipu-dp.c

273

u32 reg, csc;

drivers/gpu/ipu-v3/ipu-dp.c

283

csc = reg & DP_COM_CONF_CSC_DEF_MASK;

drivers/gpu/ipu-v3/ipu-dp.c

285

if (csc == DP_COM_CONF_CSC_DEF_BOTH || csc == DP_COM_CONF_CSC_DEF_BG)

drivers/gpu/ipu-v3/ipu-ic-csc.c

355

static int calc_csc_coeffs(struct ipu_ic_csc *csc)

drivers/gpu/ipu-v3/ipu-ic-csc.c

360

tbl_idx = (QUANT_MAP(csc->in_cs.quant) << 1) |

drivers/gpu/ipu-v3/ipu-ic-csc.c

361

QUANT_MAP(csc->out_cs.quant);

drivers/gpu/ipu-v3/ipu-ic-csc.c

363

if (csc->in_cs.cs == csc->out_cs.cs) {

drivers/gpu/ipu-v3/ipu-ic-csc.c

364

csc->params = (csc->in_cs.cs == IPUV3_COLORSPACE_YUV) ?

drivers/gpu/ipu-v3/ipu-ic-csc.c

372

switch (csc->out_cs.enc) {

drivers/gpu/ipu-v3/ipu-ic-csc.c

374

params_tbl = (csc->in_cs.cs == IPUV3_COLORSPACE_YUV) ?

drivers/gpu/ipu-v3/ipu-ic-csc.c

378

params_tbl = (csc->in_cs.cs == IPUV3_COLORSPACE_YUV) ?

drivers/gpu/ipu-v3/ipu-ic-csc.c

385

csc->params = *params_tbl[tbl_idx];

drivers/gpu/ipu-v3/ipu-ic-csc.c

390

int __ipu_ic_calc_csc(struct ipu_ic_csc *csc)

drivers/gpu/ipu-v3/ipu-ic-csc.c

392

return calc_csc_coeffs(csc);

drivers/gpu/ipu-v3/ipu-ic-csc.c

396

int ipu_ic_calc_csc(struct ipu_ic_csc *csc,

drivers/gpu/ipu-v3/ipu-ic-csc.c

404

ipu_ic_fill_colorspace(&csc->in_cs, in_enc, in_quant, in_cs);

drivers/gpu/ipu-v3/ipu-ic-csc.c

405

ipu_ic_fill_colorspace(&csc->out_cs, out_enc, out_quant, out_cs);

drivers/gpu/ipu-v3/ipu-ic-csc.c

407

return __ipu_ic_calc_csc(csc);

drivers/gpu/ipu-v3/ipu-ic.c

175

const struct ipu_ic_csc *csc,

drivers/gpu/ipu-v3/ipu-ic.c

188

c = (const u16 (*)[3])csc->params.coeff;

drivers/gpu/ipu-v3/ipu-ic.c

189

a = (const u16 *)csc->params.offset;

drivers/gpu/ipu-v3/ipu-ic.c

195

param = ((a[0] & 0x1fe0) >> 5) | (csc->params.scale << 8) |

drivers/gpu/ipu-v3/ipu-ic.c

196

(csc->params.sat << 10);

drivers/gpu/ipu-v3/ipu-ic.c

325

const struct ipu_ic_csc *csc,

drivers/gpu/ipu-v3/ipu-ic.c

359

ic->in_cs = csc->in_cs;

drivers/gpu/ipu-v3/ipu-ic.c

360

ic->out_cs = csc->out_cs;

drivers/gpu/ipu-v3/ipu-ic.c

362

ret = init_csc(ic, csc, 0);

drivers/gpu/ipu-v3/ipu-ic.c

369

const struct ipu_ic_csc *csc,

drivers/gpu/ipu-v3/ipu-ic.c

373

return ipu_ic_task_init_rsc(ic, csc,

drivers/gpu/ipu-v3/ipu-image-convert.c

1406

ret = ipu_ic_task_init_rsc(chan->ic, &ctx->csc,

drivers/gpu/ipu-v3/ipu-image-convert.c

163

struct ipu_ic_csc csc;

drivers/gpu/ipu-v3/ipu-image-convert.c

2142

ret = ipu_ic_calc_csc(&ctx->csc,

drivers/media/common/v4l2-tpg/v4l2-tpg-colors.c

1396

csc(c, x, &r, &g, &b);

drivers/media/platform/amlogic/c3/isp/c3-isp-params.c

452

const struct c3_isp_params_csc *csc = &block->csc;

drivers/media/platform/amlogic/c3/isp/c3-isp-params.c

463

ISP_CM0_COEF00_01_MTX_00(csc->matrix[0][0]));

drivers/media/platform/amlogic/c3/isp/c3-isp-params.c

466

ISP_CM0_COEF00_01_MTX_01(csc->matrix[0][1]));

drivers/media/platform/amlogic/c3/isp/c3-isp-params.c

469

ISP_CM0_COEF02_10_MTX_02(csc->matrix[0][2]));

drivers/media/platform/amlogic/c3/isp/c3-isp-params.c

473

ISP_CM0_COEF02_10_MTX_10(csc->matrix[1][0]));

drivers/media/platform/amlogic/c3/isp/c3-isp-params.c

476

ISP_CM0_COEF11_12_MTX_11(csc->matrix[1][1]));

drivers/media/platform/amlogic/c3/isp/c3-isp-params.c

479

ISP_CM0_COEF11_12_MTX_12(csc->matrix[1][2]));

drivers/media/platform/amlogic/c3/isp/c3-isp-params.c

483

ISP_CM0_COEF20_21_MTX_20(csc->matrix[2][0]));

drivers/media/platform/amlogic/c3/isp/c3-isp-params.c

486

ISP_CM0_COEF20_21_MTX_21(csc->matrix[2][1]));

drivers/media/platform/amlogic/c3/isp/c3-isp-params.c

489

ISP_CM0_COEF22_OUP_OFST0_MTX_22(csc->matrix[2][2]));

drivers/media/platform/amlogic/c3/isp/c3-isp-params.c

49

struct c3_isp_params_csc csc;

drivers/media/platform/amlogic/c3/isp/c3-isp-params.c

547

C3_ISP_PARAMS_BLOCK_INFO(CSC, csc),

drivers/media/platform/microchip/microchip-isc-base.c

1892

REG_FIELD(ISC_CSC_CTRL + isc->offsets.csc, 0, 0),

drivers/media/platform/microchip/microchip-isc.h

176

u32 csc;

drivers/media/platform/microchip/microchip-sama5d2-isc.c

222

regmap_write(regmap, ISC_CSC_YR_YG + isc->offsets.csc,

drivers/media/platform/microchip/microchip-sama5d2-isc.c

224

regmap_write(regmap, ISC_CSC_YB_OY + isc->offsets.csc,

drivers/media/platform/microchip/microchip-sama5d2-isc.c

226

regmap_write(regmap, ISC_CSC_CBR_CBG + isc->offsets.csc,

drivers/media/platform/microchip/microchip-sama5d2-isc.c

228

regmap_write(regmap, ISC_CSC_CBB_OCB + isc->offsets.csc,

drivers/media/platform/microchip/microchip-sama5d2-isc.c

230

regmap_write(regmap, ISC_CSC_CRR_CRG + isc->offsets.csc,

drivers/media/platform/microchip/microchip-sama5d2-isc.c

232

regmap_write(regmap, ISC_CSC_CRB_OCR + isc->offsets.csc,

drivers/media/platform/microchip/microchip-sama5d2-isc.c

459

isc->offsets.csc = ISC_SAMA5D2_CSC_OFFSET;

drivers/media/platform/microchip/microchip-sama7g5-isc.c

235

regmap_write(regmap, ISC_CSC_YR_YG + isc->offsets.csc,

drivers/media/platform/microchip/microchip-sama7g5-isc.c

237

regmap_write(regmap, ISC_CSC_YB_OY + isc->offsets.csc,

drivers/media/platform/microchip/microchip-sama7g5-isc.c

239

regmap_write(regmap, ISC_CSC_CBR_CBG + isc->offsets.csc,

drivers/media/platform/microchip/microchip-sama7g5-isc.c

241

regmap_write(regmap, ISC_CSC_CBB_OCB + isc->offsets.csc,

drivers/media/platform/microchip/microchip-sama7g5-isc.c

243

regmap_write(regmap, ISC_CSC_CRR_CRG + isc->offsets.csc,

drivers/media/platform/microchip/microchip-sama7g5-isc.c

245

regmap_write(regmap, ISC_CSC_CRB_OCR + isc->offsets.csc,

drivers/media/platform/microchip/microchip-sama7g5-isc.c

448

isc->offsets.csc = ISC_SAMA7G5_CSC_OFFSET;

drivers/media/platform/qcom/venus/hfi_cmds.c

1004

struct hfi_vpe_color_space_conversion *csc = prop_data;

drivers/media/platform/qcom/venus/hfi_cmds.c

1006

memcpy(csc->csc_matrix, in->csc_matrix,

drivers/media/platform/qcom/venus/hfi_cmds.c

1007

sizeof(csc->csc_matrix));

drivers/media/platform/qcom/venus/hfi_cmds.c

1008

memcpy(csc->csc_bias, in->csc_bias, sizeof(csc->csc_bias));

drivers/media/platform/qcom/venus/hfi_cmds.c

1009

memcpy(csc->csc_limit, in->csc_limit, sizeof(csc->csc_limit));

drivers/media/platform/qcom/venus/hfi_cmds.c

1010

pkt->shdr.hdr.size += sizeof(u32) + sizeof(*csc);

drivers/media/platform/renesas/vsp1/vsp1_rwpf.c

108

csc = (format->code == MEDIA_BUS_FMT_AYUV8_1X32) !=

drivers/media/platform/renesas/vsp1/vsp1_rwpf.c

111

if (csc && (flags & V4L2_MBUS_FRAMEFMT_SET_CSC)) {

drivers/media/platform/renesas/vsp1/vsp1_rwpf.c

88

bool csc;

drivers/media/platform/ti/omap3isp/isppreview.c

1342

params->csc = flr_prev_csc;

drivers/media/platform/ti/omap3isp/isppreview.c

400

const struct omap3isp_prev_csc *csc = &params->csc;

drivers/media/platform/ti/omap3isp/isppreview.c

403

val = (csc->matrix[0][0] & 0x3ff) << ISPPRV_CSC0_RY_SHIFT;

drivers/media/platform/ti/omap3isp/isppreview.c

404

val |= (csc->matrix[0][1] & 0x3ff) << ISPPRV_CSC0_GY_SHIFT;

drivers/media/platform/ti/omap3isp/isppreview.c

405

val |= (csc->matrix[0][2] & 0x3ff) << ISPPRV_CSC0_BY_SHIFT;

drivers/media/platform/ti/omap3isp/isppreview.c

408

val = (csc->matrix[1][0] & 0x3ff) << ISPPRV_CSC1_RCB_SHIFT;

drivers/media/platform/ti/omap3isp/isppreview.c

409

val |= (csc->matrix[1][1] & 0x3ff) << ISPPRV_CSC1_GCB_SHIFT;

drivers/media/platform/ti/omap3isp/isppreview.c

410

val |= (csc->matrix[1][2] & 0x3ff) << ISPPRV_CSC1_BCB_SHIFT;

drivers/media/platform/ti/omap3isp/isppreview.c

413

val = (csc->matrix[2][0] & 0x3ff) << ISPPRV_CSC2_RCR_SHIFT;

drivers/media/platform/ti/omap3isp/isppreview.c

414

val |= (csc->matrix[2][1] & 0x3ff) << ISPPRV_CSC2_GCR_SHIFT;

drivers/media/platform/ti/omap3isp/isppreview.c

415

val |= (csc->matrix[2][2] & 0x3ff) << ISPPRV_CSC2_BCR_SHIFT;

drivers/media/platform/ti/omap3isp/isppreview.c

418

val = (csc->offset[0] & 0xff) << ISPPRV_CSC_OFFSET_Y_SHIFT;

drivers/media/platform/ti/omap3isp/isppreview.c

419

val |= (csc->offset[1] & 0xff) << ISPPRV_CSC_OFFSET_CB_SHIFT;

drivers/media/platform/ti/omap3isp/isppreview.c

420

val |= (csc->offset[2] & 0xff) << ISPPRV_CSC_OFFSET_CR_SHIFT;

drivers/media/platform/ti/omap3isp/isppreview.c

800

offsetof(struct prev_params, csc),

drivers/media/platform/ti/omap3isp/isppreview.c

801

sizeof_field(struct prev_params, csc),

drivers/media/platform/ti/omap3isp/isppreview.c

802

offsetof(struct omap3isp_prev_update_config, csc),

drivers/media/platform/ti/omap3isp/isppreview.h

90

struct omap3isp_prev_csc csc;

drivers/media/platform/ti/vpe/csc.c

110

void csc_dump_regs(struct csc_data *csc)

drivers/media/platform/ti/vpe/csc.c

112

struct device *dev = &csc->pdev->dev;

drivers/media/platform/ti/vpe/csc.c

115

ioread32(csc->base + CSC_##r))

drivers/media/platform/ti/vpe/csc.c

117

dev_dbg(dev, "CSC Registers @ %pa:\n", &csc->res->start);

drivers/media/platform/ti/vpe/csc.c

130

void csc_set_coeff_bypass(struct csc_data *csc, u32 *csc_reg5)

drivers/media/platform/ti/vpe/csc.c

139

void csc_set_coeff(struct csc_data *csc, u32 *csc_reg0,

drivers/media/platform/ti/vpe/csc.c

249

struct csc_data *csc;

drivers/media/platform/ti/vpe/csc.c

253

csc = devm_kzalloc(&pdev->dev, sizeof(*csc), GFP_KERNEL);

drivers/media/platform/ti/vpe/csc.c

254

if (!csc) {

drivers/media/platform/ti/vpe/csc.c

259

csc->pdev = pdev;

drivers/media/platform/ti/vpe/csc.c

261

csc->res = platform_get_resource_byname(pdev, IORESOURCE_MEM,

drivers/media/platform/ti/vpe/csc.c

263

if (csc->res == NULL) {

drivers/media/platform/ti/vpe/csc.c

269

csc->base = devm_ioremap_resource(&pdev->dev, csc->res);

drivers/media/platform/ti/vpe/csc.c

270

if (IS_ERR(csc->base))

drivers/media/platform/ti/vpe/csc.c

271

return ERR_CAST(csc->base);

drivers/media/platform/ti/vpe/csc.c

273

return csc;

drivers/media/platform/ti/vpe/csc.h

58

void csc_dump_regs(struct csc_data *csc);

drivers/media/platform/ti/vpe/csc.h

59

void csc_set_coeff_bypass(struct csc_data *csc, u32 *csc_reg5);

drivers/media/platform/ti/vpe/csc.h

60

void csc_set_coeff(struct csc_data *csc, u32 *csc_reg0,

drivers/media/platform/ti/vpe/vip.c

1865

if (port->csc == VIP_CSC_Y2R) {

drivers/media/platform/ti/vpe/vip.c

1868

} else if (port->csc == VIP_CSC_R2Y) {

drivers/media/platform/ti/vpe/vip.c

2015

if (port->csc == VIP_CSC_Y2R) {

drivers/media/platform/ti/vpe/vip.c

2018

} else if (port->csc == VIP_CSC_R2Y) {

drivers/media/platform/ti/vpe/vip.c

2233

struct csc_data *csc = dev->csc;

drivers/media/platform/ti/vpe/vip.c

2269

if (port->csc) {

drivers/media/platform/ti/vpe/vip.c

2270

csc_set_coeff(csc, &mmr_adb->csc_regs[0],

drivers/media/platform/ti/vpe/vip.c

2544

port->csc = csc_direction;

drivers/media/platform/ti/vpe/vip.c

2559

port->csc = VIP_CSC_NA;

drivers/media/platform/ti/vpe/vip.c

3164

enum vip_csc_state csc;

drivers/media/platform/ti/vpe/vip.c

3192

csc = vip_csc_direction(fmt->code, fmt->finfo);

drivers/media/platform/ti/vpe/vip.c

3194

(csc != VIP_CSC_NA || fmt->coplanar))

drivers/media/platform/ti/vpe/vip.c

3461

struct csc_data *csc;

drivers/media/platform/ti/vpe/vip.c

3515

csc = devm_kzalloc(&pdev->dev, sizeof(*dev->csc), GFP_KERNEL);

drivers/media/platform/ti/vpe/vip.c

3516

if (!csc)

drivers/media/platform/ti/vpe/vip.c

3517

return PTR_ERR_OR_ZERO(csc);

drivers/media/platform/ti/vpe/vip.c

3519

csc->base = dev->base + (slice ? VIP_SLICE1_CSC : VIP_SLICE0_CSC);

drivers/media/platform/ti/vpe/vip.c

3520

if (IS_ERR(csc->base))

drivers/media/platform/ti/vpe/vip.c

3521

return PTR_ERR(csc->base);

drivers/media/platform/ti/vpe/vip.c

3523

csc->pdev = pdev;

drivers/media/platform/ti/vpe/vip.c

3524

dev->csc = csc;

drivers/media/platform/ti/vpe/vip.c

423

GET_OFFSET_TOP(port, port->dev->csc, CSC_CSC00));

drivers/media/platform/ti/vpe/vip.c

677

port->csc == VIP_CSC_NA &&

drivers/media/platform/ti/vpe/vip.h

161

struct csc_data *csc;

drivers/media/platform/ti/vpe/vip.h

202

enum vip_csc_state csc;

drivers/media/platform/ti/vpe/vpe.c

1017

csc_dump_regs(dev->csc);

drivers/media/platform/ti/vpe/vpe.c

2595

dev->csc = csc_create(pdev, "csc");

drivers/media/platform/ti/vpe/vpe.c

2596

if (IS_ERR(dev->csc)) {

drivers/media/platform/ti/vpe/vpe.c

2597

ret = PTR_ERR(dev->csc);

drivers/media/platform/ti/vpe/vpe.c

389

struct csc_data *csc; /* csc data handle */

drivers/media/platform/ti/vpe/vpe.c

541

GET_OFFSET_TOP(ctx, ctx->dev->csc, CSC_CSC00));

drivers/media/platform/ti/vpe/vpe.c

913

csc_set_coeff(ctx->dev->csc, &mmr_adb->csc_regs[0],

drivers/pcmcia/i82092.c

310

int csc;

drivers/pcmcia/i82092.c

317

csc = indirect_read(i, I365_CSC);

drivers/pcmcia/i82092.c

319

if (csc == 0) /* no events on this socket */

drivers/pcmcia/i82092.c

324

if (csc & I365_CSC_DETECT) {

drivers/pcmcia/i82092.c

332

if (csc & I365_CSC_STSCHG)

drivers/pcmcia/i82092.c

336

if (csc & I365_CSC_BVD1)

drivers/pcmcia/i82092.c

338

if (csc & I365_CSC_BVD2)

drivers/pcmcia/i82092.c

340

if (csc & I365_CSC_READY)

drivers/pcmcia/i82365.c

833

int i, j, csc;

drivers/pcmcia/i82365.c

847

csc = i365_get(i, I365_CSC);

drivers/pcmcia/i82365.c

848

if ((csc == 0) || (i365_get(i, I365_IDENT) & 0x70)) {

drivers/pcmcia/i82365.c

852

events = (csc & I365_CSC_DETECT) ? SS_DETECT : 0;

drivers/pcmcia/i82365.c

855

events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0;

drivers/pcmcia/i82365.c

857

events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0;

drivers/pcmcia/i82365.c

858

events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0;

drivers/pcmcia/i82365.c

859

events |= (csc & I365_CSC_READY) ? SS_READY : 0;

drivers/pcmcia/pd6729.c

192

unsigned int csc;

drivers/pcmcia/pd6729.c

195

csc = indirect_read(&socket[i], I365_CSC);

drivers/pcmcia/pd6729.c

196

if (csc == 0) /* no events on this socket */

drivers/pcmcia/pd6729.c

202

if (csc & I365_CSC_DETECT) {

drivers/pcmcia/pd6729.c

211

events |= (csc & I365_CSC_STSCHG)

drivers/pcmcia/pd6729.c

215

events |= (csc & I365_CSC_BVD1)

drivers/pcmcia/pd6729.c

217

events |= (csc & I365_CSC_BVD2)

drivers/pcmcia/pd6729.c

219

events |= (csc & I365_CSC_READY)

drivers/pcmcia/yenta_socket.c

512

u8 csc;

drivers/pcmcia/yenta_socket.c

519

csc = exca_readb(socket, I365_CSC);

drivers/pcmcia/yenta_socket.c

521

if (!(cb_event || csc))

drivers/pcmcia/yenta_socket.c

525

events |= (csc & I365_CSC_DETECT) ? SS_DETECT : 0;

drivers/pcmcia/yenta_socket.c

527

events |= (csc & I365_CSC_STSCHG) ? SS_STSCHG : 0;

drivers/pcmcia/yenta_socket.c

529

events |= (csc & I365_CSC_BVD1) ? SS_BATDEAD : 0;

drivers/pcmcia/yenta_socket.c

530

events |= (csc & I365_CSC_BVD2) ? SS_BATWARN : 0;

drivers/pcmcia/yenta_socket.c

531

events |= (csc & I365_CSC_READY) ? SS_READY : 0;

drivers/pcmcia/yenta_socket.c

970

u8 csc;

drivers/pcmcia/yenta_socket.c

976

csc = exca_readb(socket, I365_CSC);

drivers/pcmcia/yenta_socket.c

978

if (cb_event || csc) {

drivers/staging/media/atomisp/pci/ia_css_isp_params.c

277

stage->binary->info->mem_offsets.offsets.param->dmem.csc.size;

drivers/staging/media/atomisp/pci/ia_css_isp_params.c

280

stage->binary->info->mem_offsets.offsets.param->dmem.csc.offset;

drivers/staging/media/atomisp/pci/ia_css_isp_params.h

73

struct ia_css_isp_parameter csc;

drivers/staging/media/atomisp/pci/isp/kernels/csc/csc_1.0/ia_css_csc.host.c

100

const struct sh_css_isp_csc_params *csc,

drivers/staging/media/atomisp/pci/isp/kernels/csc/csc_1.0/ia_css_csc.host.c

103

ia_css_cc_dump(csc, level, "Color Space Conversion");

drivers/staging/media/atomisp/pci/isp/kernels/csc/csc_1.0/ia_css_csc.host.c

60

const struct sh_css_isp_csc_params *csc,

drivers/staging/media/atomisp/pci/isp/kernels/csc/csc_1.0/ia_css_csc.host.c

64

if (!csc) return;

drivers/staging/media/atomisp/pci/isp/kernels/csc/csc_1.0/ia_css_csc.host.c

68

csc->m_shift);

drivers/staging/media/atomisp/pci/isp/kernels/csc/csc_1.0/ia_css_csc.host.c

71

csc->m00);

drivers/staging/media/atomisp/pci/isp/kernels/csc/csc_1.0/ia_css_csc.host.c

74

csc->m01);

drivers/staging/media/atomisp/pci/isp/kernels/csc/csc_1.0/ia_css_csc.host.c

77

csc->m02);

drivers/staging/media/atomisp/pci/isp/kernels/csc/csc_1.0/ia_css_csc.host.c

80

csc->m10);

drivers/staging/media/atomisp/pci/isp/kernels/csc/csc_1.0/ia_css_csc.host.c

83

csc->m11);

drivers/staging/media/atomisp/pci/isp/kernels/csc/csc_1.0/ia_css_csc.host.c

86

csc->m12);

drivers/staging/media/atomisp/pci/isp/kernels/csc/csc_1.0/ia_css_csc.host.c

89

csc->m20);

drivers/staging/media/atomisp/pci/isp/kernels/csc/csc_1.0/ia_css_csc.host.c

92

csc->m21);

drivers/staging/media/atomisp/pci/isp/kernels/csc/csc_1.0/ia_css_csc.host.c

95

csc->m22);

drivers/staging/media/atomisp/pci/isp/kernels/csc/csc_1.0/ia_css_csc.host.h

30

const struct sh_css_isp_csc_params *csc, unsigned int level,

drivers/staging/media/atomisp/pci/isp/kernels/csc/csc_1.0/ia_css_csc.host.h

35

const struct sh_css_isp_csc_params *csc,

drivers/staging/media/atomisp/pci/runtime/debug/src/ia_css_debug.c

932

ia_css_csc_dump(FIND_DMEM_PARAMS(stream, csc), IA_CSS_DEBUG_VERBOSE);

drivers/staging/media/atomisp/pci/runtime/debug/src/ia_css_debug.c

933

ia_css_yuv2rgb_dump(FIND_DMEM_PARAMS_TYPE(stream, yuv2rgb, csc),

drivers/staging/media/atomisp/pci/runtime/debug/src/ia_css_debug.c

935

ia_css_rgb2yuv_dump(FIND_DMEM_PARAMS_TYPE(stream, rgb2yuv, csc),

drivers/staging/media/deprecated/atmel/atmel-isc-base.c

1977

REG_FIELD(ISC_CSC_CTRL + isc->offsets.csc, 0, 0),

drivers/staging/media/deprecated/atmel/atmel-isc.h

175

u32 csc;

drivers/staging/media/deprecated/atmel/atmel-sama5d2-isc.c

202

regmap_write(regmap, ISC_CSC_YR_YG + isc->offsets.csc,

drivers/staging/media/deprecated/atmel/atmel-sama5d2-isc.c

204

regmap_write(regmap, ISC_CSC_YB_OY + isc->offsets.csc,

drivers/staging/media/deprecated/atmel/atmel-sama5d2-isc.c

206

regmap_write(regmap, ISC_CSC_CBR_CBG + isc->offsets.csc,

drivers/staging/media/deprecated/atmel/atmel-sama5d2-isc.c

208

regmap_write(regmap, ISC_CSC_CBB_OCB + isc->offsets.csc,

drivers/staging/media/deprecated/atmel/atmel-sama5d2-isc.c

210

regmap_write(regmap, ISC_CSC_CRR_CRG + isc->offsets.csc,

drivers/staging/media/deprecated/atmel/atmel-sama5d2-isc.c

212

regmap_write(regmap, ISC_CSC_CRB_OCR + isc->offsets.csc,

drivers/staging/media/deprecated/atmel/atmel-sama5d2-isc.c

440

isc->offsets.csc = ISC_SAMA5D2_CSC_OFFSET;

drivers/staging/media/deprecated/atmel/atmel-sama7g5-isc.c

215

regmap_write(regmap, ISC_CSC_YR_YG + isc->offsets.csc,

drivers/staging/media/deprecated/atmel/atmel-sama7g5-isc.c

217

regmap_write(regmap, ISC_CSC_YB_OY + isc->offsets.csc,

drivers/staging/media/deprecated/atmel/atmel-sama7g5-isc.c

219

regmap_write(regmap, ISC_CSC_CBR_CBG + isc->offsets.csc,

drivers/staging/media/deprecated/atmel/atmel-sama7g5-isc.c

221

regmap_write(regmap, ISC_CSC_CBB_OCB + isc->offsets.csc,

drivers/staging/media/deprecated/atmel/atmel-sama7g5-isc.c

223

regmap_write(regmap, ISC_CSC_CRR_CRG + isc->offsets.csc,

drivers/staging/media/deprecated/atmel/atmel-sama7g5-isc.c

225

regmap_write(regmap, ISC_CSC_CRB_OCR + isc->offsets.csc,

drivers/staging/media/deprecated/atmel/atmel-sama7g5-isc.c

429

isc->offsets.csc = ISC_SAMA7G5_CSC_OFFSET;

drivers/staging/media/imx/imx-ic-prpencvf.c

455

struct ipu_ic_csc csc;

drivers/staging/media/imx/imx-ic-prpencvf.c

464

ret = ipu_ic_calc_csc(&csc,

drivers/staging/media/imx/imx-ic-prpencvf.c

488

ret = ipu_ic_task_init(priv->ic, &csc,

drivers/staging/media/imx/imx-ic-prpencvf.c

584

struct ipu_ic_csc csc;

drivers/staging/media/imx/imx-ic-prpencvf.c

593

ret = ipu_ic_calc_csc(&csc,

drivers/staging/media/imx/imx-ic-prpencvf.c

604

ret = ipu_ic_task_init(priv->ic, &csc,

drivers/staging/media/ipu3/include/uapi/intel-ipu3.h

2505

struct ipu3_uapi_csc_mat_config csc __attribute__((aligned(32)));

drivers/staging/media/ipu3/ipu3-abi.h

1281

struct ipu3_uapi_csc_mat_config csc __aligned(32);

drivers/staging/media/ipu3/ipu3-css-params.c

2084

acc->csc = acc_user->csc;

drivers/staging/media/ipu3/ipu3-css-params.c

2087

acc->csc = acc_old->csc;

drivers/staging/media/ipu3/ipu3-css-params.c

2090

acc->csc = imgu_css_csc_defaults;

drivers/video/fbdev/cg14.c

113

u16 csc; /* Composite Sync Clear */

drivers/video/fbdev/mmp/hw/mmp_ctrl.h

625

#define CFG_CSC(csc) ((csc)<<8)

drivers/video/fbdev/pxa168fb.h

395

#define CFG_CSC(csc) ((csc) << 8) /* csc */

include/uapi/linux/media/raspberrypi/pisp_be_config.h

820

struct pisp_be_ccm_config csc[PISP_BACK_END_NUM_OUTPUTS];

include/uapi/linux/omap3isp.h

667

struct omap3isp_prev_csc __user *csc;

include/video/imx-ipu-v3.h

424

int __ipu_ic_calc_csc(struct ipu_ic_csc *csc);

include/video/imx-ipu-v3.h

425

int ipu_ic_calc_csc(struct ipu_ic_csc *csc,

include/video/imx-ipu-v3.h

433

const struct ipu_ic_csc *csc,

include/video/imx-ipu-v3.h

437

const struct ipu_ic_csc *csc,