core_writel
core_writel(priv, value, SF2_PAGE_REG_MKADDR(page, reg));
core_writel(priv, value, SF2_PAGE_REG_MKADDR(page, reg));
core_writel(priv, value, SF2_PAGE_REG_MKADDR(page, reg));
core_writel(priv, reg, CORE_GMNCFGCFG);
core_writel(priv, reg, CORE_GMNCFGCFG);
core_writel(priv, reg, CORE_MEM_PSM_VDD_CTRL);
core_writel(priv, SW_FWDG_EN, CORE_SWMODE);
core_writel(priv, reg, CORE_SWITCH_CTRL);
core_writel(priv, reg, CORE_PORT_TC2_QOS_MAP_PORT(port));
core_writel(priv, reg, CORE_IMP_CTL);
core_writel(priv, reg, CORE_G_PCTL_PORT(port));
core_writel(priv, reg, CORE_MEM_PSM_VDD_CTRL);
core_writel(priv, reg, CORE_PORT_TC2_QOS_MAP_PORT(port));
core_writel(priv, 32, CORE_TXQ_THD_PAUSE_QN_PORT(port));
core_writel(priv, reg, CORE_DIS_LEARN);
core_writel(priv, reg, CORE_MEM_PSM_VDD_CTRL);
core_writel(priv, addr, reg);
core_writel(priv, val, reg);
core_writel(priv, reg, CORE_WATCHDOG_CTRL);
core_writel(priv, reg, offset);
core_writel(priv, reg, offset);
core_writel(priv, reg, CORE_CFP_ACC);
core_writel(priv, reg, CORE_CFP_CTL_REG);
core_writel(priv, layout->udfs[slice_num].slices[i],
core_writel(priv, reg, CORE_CFP_ACC);
core_writel(priv, reg, CORE_CFP_ACC);
core_writel(priv, reg, CORE_ACT_POL_DATA0);
core_writel(priv, rule_index << CHAIN_ID_SHIFT, CORE_ACT_POL_DATA1);
core_writel(priv, 0, CORE_ACT_POL_DATA2);
core_writel(priv, POLICER_MODE_DISABLE, CORE_RATE_METER0);
core_writel(priv, reg, CORE_CFP_MASK_PORT(5));
core_writel(priv, reg, CORE_CFP_DATA_PORT(5));
core_writel(priv, reg, offset);
core_writel(priv, reg, offset);
core_writel(priv, reg, offset);
core_writel(priv, reg, offset);
core_writel(priv, reg, offset);
core_writel(priv, BIT(port), CORE_CFP_DATA_PORT(7));
core_writel(priv, 0xff, CORE_CFP_MASK_PORT(7));
core_writel(priv, ip.key->tos << IPTOS_SHIFT |
core_writel(priv, layout->udfs[slice_num].mask_value |
core_writel(priv, reg, CORE_CFP_CTL_REG);
core_writel(priv, reg, CORE_CFP_MASK_PORT(5));
core_writel(priv, reg, CORE_CFP_DATA_PORT(5));
core_writel(priv, val, offset);
core_writel(priv, val, offset);
core_writel(priv, val, offset);
core_writel(priv, val, offset);
core_writel(priv, reg, offset);
core_writel(priv, BIT(port), CORE_CFP_DATA_PORT(7));
core_writel(priv, 0xff, CORE_CFP_MASK_PORT(7));
core_writel(priv, reg, CORE_CFP_DATA_PORT(6));
core_writel(priv, reg, CORE_CFP_MASK_PORT(6));
core_writel(priv, 0, CORE_CFP_DATA_PORT(7));
core_writel(priv, 0, CORE_CFP_MASK_PORT(7));
core_writel(priv, reg, CORE_CFP_DATA_PORT(6));
core_writel(priv, reg, CORE_CFP_MASK_PORT(6));
core_writel(priv, reg, CORE_CFP_CTL_REG);
core_writel(priv, reg, CORE_CFP_DATA_PORT(0));