cpuid_feature_extract_unsigned_field
return cpuid_feature_extract_unsigned_field(dfr0,
return !!cpuid_feature_extract_unsigned_field(dfr1,
return cpuid_feature_extract_unsigned_field(mmfr2,
return cpuid_feature_extract_unsigned_field(mmfr0, ID_AA64MMFR0_EL1_BIGEND_SHIFT) == 0x1 ||
cpuid_feature_extract_unsigned_field(mmfr0, ID_AA64MMFR0_EL1_BIGENDEL0_SHIFT) == 0x1;
u32 val = cpuid_feature_extract_unsigned_field(pfr0, ID_AA64PFR0_EL1_EL1_SHIFT);
u32 val = cpuid_feature_extract_unsigned_field(pfr0, ID_AA64PFR0_EL1_EL0_SHIFT);
u32 val = cpuid_feature_extract_unsigned_field(pfr0, ID_AA64PFR0_EL1_SVE_SHIFT);
u32 val = cpuid_feature_extract_unsigned_field(pfr1, ID_AA64PFR1_EL1_SME_SHIFT);
u32 val = cpuid_feature_extract_unsigned_field(pfr0, ID_AA64PFR0_EL1_MPAM_SHIFT);
u32 val = cpuid_feature_extract_unsigned_field(pfr1, ID_AA64PFR1_EL1_MTE_SHIFT);
csv2_val = cpuid_feature_extract_unsigned_field(pfr0,
return cpuid_feature_extract_unsigned_field(isar2,
val = cpuid_feature_extract_unsigned_field(mmfr0,
val = cpuid_feature_extract_unsigned_field(mmfr0,
val = cpuid_feature_extract_unsigned_field(mmfr0,
val = cpuid_feature_extract_unsigned_field(mmfr0,
return cpuid_feature_extract_unsigned_field(mmfr1,
return cpuid_feature_extract_unsigned_field(mmfr1,
vmid_bits = cpuid_feature_extract_unsigned_field(mmfr1,
return cpuid_feature_extract_unsigned_field(val, feat);
cpuid_feature_extract_unsigned_field(dfr0,
cpuid_feature_extract_unsigned_field(dfr0,
u64 parange = cpuid_feature_extract_unsigned_field(mmfr0,
if (cpuid_feature_extract_unsigned_field(mmfr2,
d_size = 4 << cpuid_feature_extract_unsigned_field(ctr_el0,
pmuver = cpuid_feature_extract_unsigned_field(dfr0,
tgran = cpuid_feature_extract_unsigned_field(mmfr0,
tgran = cpuid_feature_extract_unsigned_field(mmfr0,
pmuver = cpuid_feature_extract_unsigned_field(dfr0,
return cpuid_feature_extract_unsigned_field(mvfr1, MVFR1_EL1_SIMDSP_SHIFT) &&
cpuid_feature_extract_unsigned_field(mvfr1, MVFR1_EL1_SIMDInt_SHIFT) &&
cpuid_feature_extract_unsigned_field(mvfr1, MVFR1_EL1_SIMDLS_SHIFT);
parange = cpuid_feature_extract_unsigned_field(mmfr0,
return cpuid_feature_extract_unsigned_field(read_sanitised_ftr_reg(SYS_ID_AA64DFR0_EL1),
cpuid_feature_extract_unsigned_field(mmfr1,
u64 parange = cpuid_feature_extract_unsigned_field(mmfr0,
if (cpuid_feature_extract_unsigned_field(pfr0, ID_AA64PFR0_EL1_CSV2_SHIFT))
return cpuid_feature_extract_unsigned_field(mmfr1,
if (cpuid_feature_extract_unsigned_field(dfr0, ID_AA64DFR0_EL1_TraceBuffer_SHIFT) &&
return cpuid_feature_extract_unsigned_field(dfr0, ID_AA64DFR0_EL1_PMSVer_SHIFT) &&
unsigned int pmuver = cpuid_feature_extract_unsigned_field(dfr0,
if (cpuid_feature_extract_unsigned_field(dfr0, ID_AA64DFR0_EL1_BRBE_SHIFT))
if (cpuid_feature_extract_unsigned_field(dfr0, ID_AA64DFR0_EL1_TraceFilt_SHIFT)) {
return cpuid_feature_extract_unsigned_field(pfr0,
parange = cpuid_feature_extract_unsigned_field(mmfr0,
switch (cpuid_feature_extract_unsigned_field(mmfr0, ID_AA64MMFR0_EL1_TGRAN_2_SHIFT)) {
int fld = cpuid_feature_extract_unsigned_field(read_cpuid(ID_AA64MMFR0_EL1),
u64 lsize = 4 << cpuid_feature_extract_unsigned_field(ctr,
if (!cpuid_feature_extract_unsigned_field(dfr0, ID_AA64DFR0_EL1_TraceFilt_SHIFT))
unsigned int trbe = cpuid_feature_extract_unsigned_field(aa64dfr0,
fld = cpuid_feature_extract_unsigned_field(reg, ID_AA64MMFR0_EL1_PARANGE_SHIFT);
fld = cpuid_feature_extract_unsigned_field(reg, ID_AA64MMFR0_EL1_ASIDBITS_SHIFT);
par = cpuid_feature_extract_unsigned_field(
fld = cpuid_feature_extract_unsigned_field(reg, ID_AA64PFR0_EL1_GIC_SHIFT);
brbe = cpuid_feature_extract_unsigned_field(aa64dfr0, ID_AA64DFR0_EL1_BRBE_SHIFT);
fld = cpuid_feature_extract_unsigned_field(read_cpuid(ID_AA64DFR0_EL1),