arch/x86/events/amd/ibs.c

1004

.config_mask = IBS_OP_MAX_CNT,

arch/x86/events/amd/ibs.c

1645

perf_ibs_fetch.config_mask |= IBS_FETCH_L3MISSONLY;

arch/x86/events/amd/ibs.c

1659

perf_ibs_op.config_mask |= IBS_OP_CNT_CTL;

arch/x86/events/amd/ibs.c

1663

perf_ibs_op.config_mask |= IBS_OP_MAX_CNT_EXT_MASK;

arch/x86/events/amd/ibs.c

1669

perf_ibs_op.config_mask |= IBS_OP_L3MISSONLY;

arch/x86/events/amd/ibs.c

324

if (config & ~perf_ibs->config_mask)

arch/x86/events/amd/ibs.c

95

u64 config_mask;

arch/x86/events/amd/ibs.c

978

.config_mask = IBS_FETCH_MAX_CNT | IBS_FETCH_RAND_EN,

arch/x86/events/core.c

183

if (er->event != (config & er->config_mask))

arch/x86/events/core.c

2181

if (!x86_pmu.config_mask)

arch/x86/events/core.c

2182

x86_pmu.config_mask = X86_RAW_EVENT_MASK;

arch/x86/events/intel/core.c

5785

u64 mask = hybrid(dev_get_drvdata(dev), config_mask) & ARCH_PERFMON_EVENTSEL_UMASK2;

arch/x86/events/intel/core.c

5821

mask = hybrid(dev_get_drvdata(dev), config_mask);

arch/x86/events/intel/core.c

6193

hybrid(pmu, config_mask) |= ARCH_PERFMON_EVENTSEL_UMASK2;

arch/x86/events/intel/core.c

6195

hybrid(pmu, config_mask) |= ARCH_PERFMON_EVENTSEL_EQ;

arch/x86/events/intel/core.c

6197

hybrid(pmu, config_mask) |= ARCH_PERFMON_EVENTSEL_RDPMC_USER_DISABLE;

arch/x86/events/intel/core.c

7696

pmu->config_mask = X86_RAW_EVENT_MASK;

arch/x86/events/intel/core.c

7917

x86_pmu.config_mask = X86_RAW_EVENT_MASK;

arch/x86/events/intel/uncore_nhmex.c

781

if (er->event != (event->hw.config & er->config_mask))

arch/x86/events/intel/uncore_snbep.c

1009

if (er->event != (event->hw.config & er->config_mask))

arch/x86/events/intel/uncore_snbep.c

107

.config_mask = (m), \

arch/x86/events/intel/uncore_snbep.c

1744

if (er->event != (event->hw.config & er->config_mask))

arch/x86/events/intel/uncore_snbep.c

2172

if (er->event != (event->hw.config & er->config_mask))

arch/x86/events/intel/uncore_snbep.c

2727

if (er->event != (event->hw.config & er->config_mask))

arch/x86/events/intel/uncore_snbep.c

3568

if (er->event != (event->hw.config & er->config_mask))

arch/x86/events/perf_event.h

1341

return event->attr.config & hybrid(event->pmu, config_mask);

arch/x86/events/perf_event.h

1346

return !!(hybrid(pmu, config_mask) &

arch/x86/events/perf_event.h

625

u64 config_mask;

arch/x86/events/perf_event.h

634

.config_mask = (m), \

arch/x86/events/perf_event.h

747

u64 config_mask;

arch/x86/events/perf_event.h

860

u64 config_mask;

drivers/ata/sata_nv.c

705

u32 current_reg, new_reg, config_mask;

drivers/ata/sata_nv.c

741

config_mask = NV_MCP_SATA_CFG_20_PORT1_EN |

drivers/ata/sata_nv.c

744

config_mask = NV_MCP_SATA_CFG_20_PORT0_EN |

drivers/ata/sata_nv.c

748

new_reg = current_reg | config_mask;

drivers/ata/sata_nv.c

751

new_reg = current_reg & ~config_mask;

drivers/gpu/drm/i915/i915_pmu.c

145

mask |= config_mask(__I915_PMU_ACTUAL_FREQUENCY(i)) |

drivers/gpu/drm/i915/i915_pmu.c

146

config_mask(__I915_PMU_REQUESTED_FREQUENCY(i));

drivers/gpu/drm/i915/i915_pmu.c

455

(config_mask(__I915_PMU_ACTUAL_FREQUENCY(gt)) |

drivers/gpu/drm/i915/i915_pmu.c

456

config_mask(__I915_PMU_REQUESTED_FREQUENCY(gt)));

drivers/gpu/drm/i915/i915_pmu.c

476

if (pmu->enable & config_mask(__I915_PMU_ACTUAL_FREQUENCY(gt_id))) {

drivers/gpu/drm/i915/i915_pmu.c

496

if (pmu->enable & config_mask(__I915_PMU_REQUESTED_FREQUENCY(gt_id))) {

drivers/hwmon/lm95234.c

422

u8 config_mask, model_mask;

drivers/hwmon/lm95234.c

438

config_mask = 0xbf;

drivers/hwmon/lm95234.c

445

config_mask = 0xbc;

drivers/hwmon/lm95234.c

458

if (val & config_mask)