Symbol: CC_HWQ_GENMASK
drivers/crypto/ccree/cc_hw_queue_defs.h
27
#define WORD0_VALUE CC_HWQ_GENMASK(0, VALUE)
drivers/crypto/ccree/cc_hw_queue_defs.h
28
#define WORD0_CPP_CIPHER_MODE CC_HWQ_GENMASK(0, CPP_CIPHER_MODE)
drivers/crypto/ccree/cc_hw_queue_defs.h
29
#define WORD1_DIN_CONST_VALUE CC_HWQ_GENMASK(1, DIN_CONST_VALUE)
drivers/crypto/ccree/cc_hw_queue_defs.h
30
#define WORD1_DIN_DMA_MODE CC_HWQ_GENMASK(1, DIN_DMA_MODE)
drivers/crypto/ccree/cc_hw_queue_defs.h
31
#define WORD1_DIN_SIZE CC_HWQ_GENMASK(1, DIN_SIZE)
drivers/crypto/ccree/cc_hw_queue_defs.h
32
#define WORD1_NOT_LAST CC_HWQ_GENMASK(1, NOT_LAST)
drivers/crypto/ccree/cc_hw_queue_defs.h
33
#define WORD1_NS_BIT CC_HWQ_GENMASK(1, NS_BIT)
drivers/crypto/ccree/cc_hw_queue_defs.h
34
#define WORD1_LOCK_QUEUE CC_HWQ_GENMASK(1, LOCK_QUEUE)
drivers/crypto/ccree/cc_hw_queue_defs.h
35
#define WORD2_VALUE CC_HWQ_GENMASK(2, VALUE)
drivers/crypto/ccree/cc_hw_queue_defs.h
36
#define WORD3_DOUT_DMA_MODE CC_HWQ_GENMASK(3, DOUT_DMA_MODE)
drivers/crypto/ccree/cc_hw_queue_defs.h
37
#define WORD3_DOUT_LAST_IND CC_HWQ_GENMASK(3, DOUT_LAST_IND)
drivers/crypto/ccree/cc_hw_queue_defs.h
38
#define WORD3_DOUT_SIZE CC_HWQ_GENMASK(3, DOUT_SIZE)
drivers/crypto/ccree/cc_hw_queue_defs.h
39
#define WORD3_HASH_XOR_BIT CC_HWQ_GENMASK(3, HASH_XOR_BIT)
drivers/crypto/ccree/cc_hw_queue_defs.h
40
#define WORD3_NS_BIT CC_HWQ_GENMASK(3, NS_BIT)
drivers/crypto/ccree/cc_hw_queue_defs.h
41
#define WORD3_QUEUE_LAST_IND CC_HWQ_GENMASK(3, QUEUE_LAST_IND)
drivers/crypto/ccree/cc_hw_queue_defs.h
42
#define WORD4_ACK_NEEDED CC_HWQ_GENMASK(4, ACK_NEEDED)
drivers/crypto/ccree/cc_hw_queue_defs.h
43
#define WORD4_AES_SEL_N_HASH CC_HWQ_GENMASK(4, AES_SEL_N_HASH)
drivers/crypto/ccree/cc_hw_queue_defs.h
44
#define WORD4_AES_XOR_CRYPTO_KEY CC_HWQ_GENMASK(4, AES_XOR_CRYPTO_KEY)
drivers/crypto/ccree/cc_hw_queue_defs.h
45
#define WORD4_BYTES_SWAP CC_HWQ_GENMASK(4, BYTES_SWAP)
drivers/crypto/ccree/cc_hw_queue_defs.h
46
#define WORD4_CIPHER_CONF0 CC_HWQ_GENMASK(4, CIPHER_CONF0)
drivers/crypto/ccree/cc_hw_queue_defs.h
47
#define WORD4_CIPHER_CONF1 CC_HWQ_GENMASK(4, CIPHER_CONF1)
drivers/crypto/ccree/cc_hw_queue_defs.h
48
#define WORD4_CIPHER_CONF2 CC_HWQ_GENMASK(4, CIPHER_CONF2)
drivers/crypto/ccree/cc_hw_queue_defs.h
49
#define WORD4_CIPHER_DO CC_HWQ_GENMASK(4, CIPHER_DO)
drivers/crypto/ccree/cc_hw_queue_defs.h
50
#define WORD4_CIPHER_MODE CC_HWQ_GENMASK(4, CIPHER_MODE)
drivers/crypto/ccree/cc_hw_queue_defs.h
51
#define WORD4_CMAC_SIZE0 CC_HWQ_GENMASK(4, CMAC_SIZE0)
drivers/crypto/ccree/cc_hw_queue_defs.h
52
#define WORD4_DATA_FLOW_MODE CC_HWQ_GENMASK(4, DATA_FLOW_MODE)
drivers/crypto/ccree/cc_hw_queue_defs.h
53
#define WORD4_KEY_SIZE CC_HWQ_GENMASK(4, KEY_SIZE)
drivers/crypto/ccree/cc_hw_queue_defs.h
54
#define WORD4_SETUP_OPERATION CC_HWQ_GENMASK(4, SETUP_OPERATION)
drivers/crypto/ccree/cc_hw_queue_defs.h
55
#define WORD5_DIN_ADDR_HIGH CC_HWQ_GENMASK(5, DIN_ADDR_HIGH)
drivers/crypto/ccree/cc_hw_queue_defs.h
56
#define WORD5_DOUT_ADDR_HIGH CC_HWQ_GENMASK(5, DOUT_ADDR_HIGH)