crn
#define MRC14(op1, crn, crm, op2) \
asm volatile("mrc p14, "#op1", %0, "#crn", "#crm", "#op2 : "=r" (val)); \
#define MCR14(val, op1, crn, crm, op2) \
asm volatile("mcr p14, "#op1", %0, "#crn", "#crm", "#op2 : : "r" (val));\
#define ESR_ELx_SYS64_ISS_SYS_VAL(op0, op1, op2, crn, crm) \
((crn) << ESR_ELx_SYS64_ISS_CRN_SHIFT) | \
#define ESR_ELx_CP15_32_ISS_SYS_VAL(op1, op2, crn, crm) \
((crn) << ESR_ELx_CP15_32_ISS_CRN_SHIFT) | \
#define sys_reg(op0, op1, crn, crm, op2) \
((crn) << CRn_shift) | ((crm) << CRm_shift) | \
#define __ARM64_SYS_REG(op0,op1,crn,crm,op2) \
ARM64_SYS_REG_SHIFT_MASK(crn, CRN) | \
#define KVM_ARM_FEATURE_ID_RANGE_IDX(op0, op1, crn, crm, op2) \
crn = sys_reg_CRn(encoding);
if (crn < CRn_mask)
#define MRC(reg, processor, op1, crn, crm, op2) \
" mrc " #processor "," #op1 ", %0," #crn "," #crm "," #op2 "\n" \
u8 crn; /* command reference number */
u8 crn; /* SCSI Command Reference No. */
u8 crn; /* SCSI Command Reference No. */
u8 crn; /* SCSI Command Reference No. */
u8 crn; /* SCSI Command Reference No. */
u8 crn; /* SCSI Command Reference No. */
u8 crn, u8 pri_ta,
desc->u.icmnd_16.crn = crn; /* SCSI Command Reference No.*/
u8 crn;
uint8_t crn;
uint8_t crn;
uint8_t crn;
cmd->crn = 0;
__u8 crn;
__u8 crn;
#define ESR_ELx_SYS64_ISS_SYS_VAL(op0, op1, op2, crn, crm) \
((crn) << ESR_ELx_SYS64_ISS_CRN_SHIFT) | \
#define ESR_ELx_CP15_32_ISS_SYS_VAL(op1, op2, crn, crm) \
((crn) << ESR_ELx_CP15_32_ISS_CRN_SHIFT) | \
#define sys_reg(op0, op1, crn, crm, op2) \
((crn) << CRn_shift) | ((crm) << CRm_shift) | \
#define __ARM64_SYS_REG(op0,op1,crn,crm,op2) \
ARM64_SYS_REG_SHIFT_MASK(crn, CRN) | \
#define KVM_ARM_FEATURE_ID_RANGE_IDX(op0, op1, crn, crm, op2) \
unsigned op0, op1, crn, crm, op2;
crn = (id & KVM_REG_ARM64_SYSREG_CRN_MASK) >> KVM_REG_ARM64_SYSREG_CRN_SHIFT;
TEST_ASSERT(id == ARM64_SYS_REG(op0, op1, crn, crm, op2),
printf("\tARM64_SYS_REG(%d, %d, %d, %d, %d),\n", op0, op1, crn, crm, op2);