crm
#define MRC14(op1, crn, crm, op2) \
asm volatile("mrc p14, "#op1", %0, "#crn", "#crm", "#op2 : "=r" (val)); \
#define MCR14(val, op1, crn, crm, op2) \
asm volatile("mcr p14, "#op1", %0, "#crn", "#crm", "#op2 : : "r" (val));\
#define ESR_ELx_SYS64_ISS_SYS_VAL(op0, op1, op2, crn, crm) \
((crm) << ESR_ELx_SYS64_ISS_CRM_SHIFT))
#define ESR_ELx_CP15_32_ISS_SYS_VAL(op1, op2, crn, crm) \
((crm) << ESR_ELx_CP15_32_ISS_CRM_SHIFT))
#define ESR_ELx_CP15_64_ISS_SYS_VAL(op1, crm) \
((crm) << ESR_ELx_CP15_64_ISS_CRM_SHIFT))
#define sys_reg(op0, op1, crn, crm, op2) \
((crn) << CRn_shift) | ((crm) << CRm_shift) | \
#define SYS_AM_EL0(crm, op2) sys_reg(3, 3, 13, (crm), (op2))
#define __ARM64_SYS_REG(op0,op1,crn,crm,op2) \
ARM64_SYS_REG_SHIFT_MASK(crm, CRM) | \
#define KVM_ARM_FEATURE_ID_RANGE_IDX(op0, op1, crn, crm, op2) \
(__op1 << 6 | ((crm) & 7) << 3 | (op2)); \
int crm = (esr & ESR_ELx_SYS64_ISS_CRM_MASK) >> ESR_ELx_SYS64_ISS_CRM_SHIFT;
switch (crm) {
crm = sys_reg_CRm(encoding);
if (crm < CRm_mask)
#define ID_UNALLOCATED(crm, op2) { \
Op0(3), Op1(0), CRn(0), CRm(crm), Op2(op2), \
u8 crm = (esr & ESR_ELx_SYS64_ISS_CRM_MASK) >> ESR_ELx_SYS64_ISS_CRM_SHIFT;
return crm != 8;
#define ID_UNALLOCATED(crm, op2) { \
.name = "S3_0_0_" #crm "_" #op2, \
Op0(3), Op1(0), CRn(0), CRm(crm), Op2(op2), \
pad_y[3], crm,
u8 trm, nrm, crm;
crm = srv_p->tbe / nrm;
if (crm == 0) crm = 1;
f_abr_vc->f_crm = crm & 0xff;
crm:8;
#define MRC(reg, processor, op1, crn, crm, op2) \
" mrc " #processor "," #op1 ", %0," #crn "," #crm "," #op2 "\n" \
int crm, afcm, AFCM;
crm = CRM - 256;
crm = CRM;
crrerr = smrt * crm / 256;
#define ESR_ELx_SYS64_ISS_SYS_VAL(op0, op1, op2, crn, crm) \
((crm) << ESR_ELx_SYS64_ISS_CRM_SHIFT))
#define ESR_ELx_CP15_32_ISS_SYS_VAL(op1, op2, crn, crm) \
((crm) << ESR_ELx_CP15_32_ISS_CRM_SHIFT))
#define ESR_ELx_CP15_64_ISS_SYS_VAL(op1, crm) \
((crm) << ESR_ELx_CP15_64_ISS_CRM_SHIFT))
#define sys_reg(op0, op1, crn, crm, op2) \
((crn) << CRn_shift) | ((crm) << CRm_shift) | \
#define SYS_AM_EL0(crm, op2) sys_reg(3, 3, 13, (crm), (op2))
#define __ARM64_SYS_REG(op0,op1,crn,crm,op2) \
ARM64_SYS_REG_SHIFT_MASK(crm, CRM) | \
#define KVM_ARM_FEATURE_ID_RANGE_IDX(op0, op1, crn, crm, op2) \
(__op1 << 6 | ((crm) & 7) << 3 | (op2)); \
unsigned op0, op1, crn, crm, op2;
crm = (id & KVM_REG_ARM64_SYSREG_CRM_MASK) >> KVM_REG_ARM64_SYSREG_CRM_SHIFT;
TEST_ASSERT(id == ARM64_SYS_REG(op0, op1, crn, crm, op2),
printf("\tARM64_SYS_REG(%d, %d, %d, %d, %d),\n", op0, op1, crn, crm, op2);