cqhci_writel
cqhci_writel(cq_host, set, CQHCI_ISTE);
cqhci_writel(cq_host, set, CQHCI_ISGE);
cqhci_writel(cq_host, cqcfg, CQHCI_CFG);
cqhci_writel(cq_host, cqcfg, CQHCI_CFG);
cqhci_writel(cq_host, CQHCI_IS_HAC | CQHCI_IS_TCL, CQHCI_IS);
cqhci_writel(cq_host, cqhci_readl(cq_host, CQHCI_CFG) |
cqhci_writel(cq_host, cqcfg, CQHCI_CFG);
cqhci_writel(cq_host, cqcfg, CQHCI_CFG);
cqhci_writel(cq_host, lower_32_bits(cq_host->desc_dma_base),
cqhci_writel(cq_host, upper_32_bits(cq_host->desc_dma_base),
cqhci_writel(cq_host, cq_host->rca, CQHCI_SSC2);
cqhci_writel(cq_host, cqcfg, CQHCI_CFG);
cqhci_writel(cq_host, 0, CQHCI_CTL);
cqhci_writel(cq_host, cqcfg, CQHCI_CFG);
cqhci_writel(cq_host, CQHCI_HALT, CQHCI_CTL);
cqhci_writel(cq_host, 0, CQHCI_CTL);
cqhci_writel(cq_host, 1 << tag, CQHCI_TDBR);
cqhci_writel(cq_host, status, CQHCI_IS);
cqhci_writel(cq_host, comp_status, CQHCI_TCN);
cqhci_writel(cq_host, ctl, CQHCI_CTL);
cqhci_writel(cq_host, ctl, CQHCI_CTL);
cqhci_writel(cq_host, 0, slot_offset + 16 * sizeof(cfg->reg_val[0]));
cqhci_writel(cq_host, le32_to_cpu(cfg->reg_val[i]),
cqhci_writel(cq_host, le32_to_cpu(cfg->reg_val[17]),
cqhci_writel(cq_host, le32_to_cpu(cfg->reg_val[16]),
cqhci_writel(cq_host, host->cq_ssc1_time, CQHCI_SSC1);
cqhci_writel(cq_host, reg, CQHCI_CFG);
cqhci_writel(cq_host, reg, CQHCI_CFG);
cqhci_writel(cq_host, tmp, CQHCI_IS);
cqhci_writel(cq_host, CQHCI_HALT, CQHCI_CTL);
cqhci_writel(cq_host, 0, CQHCI_CTL);
cqhci_writel(cq_host, cqcfg, CQHCI_VENDOR_CFG1);
cqhci_writel(cq_host, value, CQHCI_CFG);
cqhci_writel(cq_host, value, CQHCI_CFG);
cqhci_writel(cq_host, (val & ~CQHCI_ENABLE),
cqhci_writel(cq_host, val, CQHCI_CFG);
cqhci_writel(cq_host, val, CQHCI_SSC1);
cqhci_writel(cq_host, reg, CQHCI_CFG);
cqhci_writel(cq_host, reg, CQHCI_CFG);