arch/arm64/include/asm/arch_gicv3.h

188

return cpus_have_cap(ARM64_HAS_GIC_PRIO_RELAXED_SYNC);

arch/arm64/include/asm/vectors.h

65

if (cpus_have_cap(ARM64_UNMAP_KERNEL_AT_EL0))

arch/arm64/kernel/alternative.c

157

if (!cpus_have_cap(cap))

arch/arm64/kernel/cpufeature.c

1784

if (cpus_have_cap(ARM64_WORKAROUND_NVIDIA_CARMEL_CNP))

arch/arm64/kernel/cpufeature.c

2281

if (!cpus_have_cap(ARM64_HAS_GICV3_CPUIF))

arch/arm64/kernel/cpufeature.c

2300

if (!cpus_have_cap(ARM64_HAS_GIC_PRIO_MASKING))

arch/arm64/kernel/cpufeature.c

2409

if (cpus_have_cap(ARM64_WORKAROUND_2658417)) {

arch/arm64/kernel/cpufeature.c

2417

if (cpus_have_cap(ARM64_WORKAROUND_SPECULATIVE_SSBS)) {

arch/arm64/kernel/cpufeature.c

2429

if (cpus_have_cap(ARM64_WORKAROUND_1742098))

arch/arm64/kernel/cpufeature.c

3510

caps_set = cpus_have_cap(caps->capability);

arch/arm64/kernel/cpufeature.c

3588

!cpus_have_cap(caps->capability))

arch/arm64/kernel/cpufeature.c

3634

system_has_cap = cpus_have_cap(caps->capability);

arch/arm64/kernel/cpufeature.c

3960

cpus_have_cap(caps->capability))

arch/arm64/kernel/mte.c

137

if (cpus_have_cap(ARM64_MTE_ASYMM)) {

arch/arm64/kernel/mte.c

167

if (!cpus_have_cap(ARM64_MTE_STORE_ONLY))

arch/arm64/kernel/mte.c

391

if (cpus_have_cap(ARM64_MTE_ASYMM) &&

arch/arm64/kernel/mte.c

600

else if (cpus_have_cap(ARM64_MTE_ASYMM) && sysfs_streq(buf, "asymm"))

arch/arm64/kernel/process.c

863

if (cpus_have_cap(ARM64_MTE_STORE_ONLY))

arch/arm64/kernel/proton-pack.c

1010

if (cpus_have_cap(ARM64_UNMAP_KERNEL_AT_EL0))

arch/arm64/kernel/proton-pack.c

579

if (cpus_have_cap(ARM64_SSBS))

arch/arm64/kvm/va_layout.c

195

if (cpus_have_cap(ARM64_HAS_VIRT_HOST_EXTN) || (!tag_val && i > 0)) {

arch/arm64/kvm/va_layout.c

219

if (!cpus_have_cap(ARM64_SPECTRE_V3A) ||

arch/arm64/kvm/va_layout.c

220

WARN_ON_ONCE(cpus_have_cap(ARM64_HAS_VIRT_HOST_EXTN)))

arch/arm64/kvm/vgic/vgic-v3.c

842

if (cpus_have_cap(ARM64_WORKAROUND_CAVIUM_30115)) {

arch/arm64/kvm/vgic/vgic-v3.c

854

if (!cpus_have_cap(ARM64_HAS_ICH_HCR_EL2_TDIR))

arch/arm64/mm/fault.c

854

if (!cpus_have_cap(ARM64_MTE_FAR))

arch/arm64/mm/mmap.c

73

if (cpus_have_cap(ARM64_HAS_EPAN)) {

arch/arm64/net/bpf_jit_comp.c

1242

if (cpus_have_cap(ARM64_HAS_VIRT_HOST_EXTN))

arch/arm64/net/bpf_jit_comp.c

1880

else if (cpus_have_cap(ARM64_HAS_LSE_ATOMICS))

arch/arm64/net/bpf_jit_comp.c

3132

!cpus_have_cap(ARM64_HAS_LSE_ATOMICS))

arch/arm64/net/bpf_jit_comp.c

497

if (cpus_have_cap(ARM64_HAS_VIRT_HOST_EXTN))

drivers/iommu/arm/arm-smmu-v3/arm-smmu-v3.c

4424

if (cpus_have_cap(ARM64_HAS_VIRT_HOST_EXTN))